AVS2004 Session PS2-MoM: Silicon Etching

Monday, November 15, 2004 8:20 AM in Room 213B

Monday Morning

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8:20 AM		PS2-MoM-1 Challenges Facing Deep Trench Silicon Etching for Present and Future Trench Technology Nodes A.M. Paterson, S. Pamarthy, A. Khan, F. Ameri, J.Y. Chen, H. Mohiuddin, T. Panagopoulos, J.P. Holland, T. Lill (Applied Materials, Inc.); A. Steinbach, S. Wege (Infineon Technologies) The reduction in trench technology nodes to 90nm and beyond brings new challenges to deep trench silicon etching of capacitor structures for DRAM applications. At present gate feature sizes of 110nm requires silicon trench etching depths of 8um, with a top critical dimension of 160nm, corresponding to an aspect ratio of 50:1. The depth, and hence aspect ratio of the trench, is determined by customer capacitor cell and leakage current requirements. In the next five years, the trench nodes will reduce further to 90nm, 70nm and 65nm with the aspect ratios of the silicon trench increasing to 65:1, 80:1 and 100:1, respectively. The shrinking of the node to smaller sizes brings new challenges to semiconductor OEMS. The technology that was used for etching trenches at one node size may not give the required trench at the smaller node size. This was found to be the case when moving from 0.35µm to 0.25µm node size where the tool of choice, AMAT DPS^TM DT, had limitations in obtaining the required customer specifications for the new node. After subsequent research and development at Applied Materials, a new High Aspect Ratio Trench (HART^TM) chamber has shown the capability of etching trenches down to the 70nm node. This paper will discuss why the choice of plasma source, source rf frequency, bias rf frequency and chamber geometry are of critical importance in achieving such high aspect ratio trenches.
8:40 AM		PS2-MoM-2 Etching High Aspect Ratio Structures in Si using SF₆/O₂ Plasma: Experiments and Feature Scale Modeling R.J. Belen, S. Gomez (University of California Santa Barbara); M. Kiehlbauch, D. Cooperberg (Lam Research Corporation); E.S. Aydil (University of California Santa Barbara) Plasma etching of high aspect ratio structures in Si is an important step in the manufacture of memory devices and MEMS components. The goal is to etch deep features anisotropically with high etch rates, high selectivity to the mask and good uniformity. We have studied the etching of deep sub-micron diameter holes in Si using SF₆/O₂ plasma. Our approach is to combine experiments and plasma diagnostics with feature scale modeling to gain a fundamental understanding of the etching kinetics necessary to develop and scale-up processes. Etching experiments are conducted in a low pressure, high density, inductively coupled plasma etching reactor. Visualization of the profiles with SEM is used together with plasma diagnostics such as optical emission and mass spectroscopies to study the effect of pressure, rf-bias voltage and SF₆-to-O₂ gas ratio on the etch rate, selectivity and feature profile shape. Simultaneous with experiments, we have developed a feature scale model of the etching process. Information from plasma diagnostics and previously published data are used to reduce the degrees of freedom in the model by estimating F, O, and ion fluxes and ion energy and angle distributions. We have designed experiments to directly measure parameters such as the chemical etch rate constant and the etch yield dependence on the ion angle. Experimentally inaccessible parameters such as sticking coefficients and etch yields are determined by matching simulated profiles with those experimentally observed under various etching conditions. The F-to-ion flux ratio and F-to-O flux ratio are found to be the important plasma parameters that determine the etch rate and anisotropy. Plasma diagnostics provide quantitative information about the location of the ion and neutral-limited regimes in the operating parameter space. The SF₆-to-O₂ gas ratio determines the balance between etching and sidewall passivation, which controls the feature profile shape.
9:00 AM		PS2-MoM-3 Etch Rate and Profile Evolution Model for High Aspect Ratio Etch in HBr/NF3/O2 Plasma A. Kersch, W. Jacobs, W. Sabisch, G. Schulze-Icking, A. Henke, S. Wege (Infineon Technologies AG, Germany) Silicon etching based on a HBr/O2/NF3 plasma generated in a capacitively coupled Merie plasma reactor is used to fabricate DRAM trench capacitors. To maintain a constant capacitance per memory cell an optimum aspect ratio and trench shape with respect to capacitance and cost has to be achieved. In this paper we report about two feature scale models of different complexity. A compact model calculates the etch rate for a given trench geometry by solving an integral equation for the neutral and ion transport inside the trench. Input parameter are ion and fast neutral fluxes and their energy distribution as a function of CCP power, pressure, magnetic field, and the fluxes of reactive radicals as a function of plasma and gas flow conditions. The efficiency of this approach allows the investigation of effects of trench profile on the etch rate for a variety of data. A high level model calculates in addition the trench profile evolution as a function of the above parameters supplemented by the particles angular distribution, a surface scattering distribution, and a chemical rate model for etch and side wall passivation. These calculations are done with an axisymmetric/3D profile simulator (TOPSI3D) which used level set front propagation, Monte Carlo particle transport, and chemical surface reaction rates (1). For the selection of the input parameter, a combination of experimental values (plasma density, V-I measurement, RGA) and reactor scale simulation (plasma, neutral gas flow and collisional sheath) is used. The paper focuses on the effects of power, magnetic field, pressure and gas flow on the etch rate and trench profile. The results of both models are in good agreement with each other as well as with experimental data for several technology nodes. ¹ W.Jacobs et al, IEDM Tech. Digest, Session 35/5, 2002 .
9:20 AM		PS2-MoM-4 Optimal Chamber Aspect Ratio of an Inductively Coupled Plasma Etcher for Advanced Gate Application Y.D. Du (Applied Materials Inc.) It has been known that the chamber aspect ratio (length/radius) played a significant role in defining ion flux and neutral flux uniformity (including passivaiton distribution) across the wafer in an inductively coupled plasma source. This paper will present a detailed study of silicon etch rate and CD uniformity as a function of chamber aspect ratio. Process parameters such as pressure, power and chemistry dependence on etch rate and CD uniformity are systematically compared under different chamber body length. A series of plasma modeling and gas flow modeling using a 2-D axisymmetrical fluid model are conducted and compared with the experimental data. The results show that an optimal chamber aspect ratio design requires careful balancing of plasma source uniformity as well as by-products distribution across the wafer in order to meet the overall stringent gate patterning etch requirements.
9:40 AM		PS2-MoM-5 Highly Anisotropic and Damage-free Gate Electrode Patterning in Neutral Beam Etching Using F₂ Based Gas Chemistry S. Noda (Tohoku University, Japan); Y. Hoshino (Showa Denko K.K., Japan); T. Ozaki, S. Samukawa (Tohoku University, Japan) Neutral beam etching is a promising candidate for the damage-free processing of semiconductor devices. To realize high-performance etching processes, we developed a new neutral beam etching system. In this system, highly efficient neutral beams could be obtained by accelerating negative ions generated in the pulse-time-modulated plasma. Damage-free 50 nm poly-Si gate electrode patterning has already been accomplished by our system using the Cl₂/SF₆ mixture gas chemistry¹. In this gas chemistry, accelerated Cl and F atoms contributed to the etching reaction and the etching profiles were controlled by changing the gas flow ratio. However, the etching rate and the pattern profile were drastically varied with changing the gas flow ratio. Especially, by increasing the SF₆ flow rate, both the etching rate and the side etching increased rapidly. There were trade-off between the etching rate and etching profile in the SF₆ based gas chemistry. Namely, SF₆ plasma generated a large amount of F radicals. To settle this problem, F₂ gas plasma was investigated to generate the fast F atom beam efficiently with maintaining low density of F radical. In comparison between F₂ and SF₆, great differences were observed in the etching characteristics. Even in the case of pure F₂ gas chemistry, the etching anisotropy drastically increased and the side etching of poly-Si hardly occurred. It is caused by elimination of the F radical generation and increase of negative ion (F^-) generation in the F₂ plasma. Using this feature, more flexible and precise control will be achieved in the neutral beam etching method. S. Noda et al., to be published in J. Vac. Sci. and Technol. A, Jul/Aug (2004).
10:00 AM		PS2-MoM-6 Silicon Recess Formation During High Density Plasma Polysilicon Gate Etching S.A. Vitale, B.A. Smith (Texas Instruments) Silicon loss during gate etch from the active region of a traditional CMOS transistor is shown to take place through plasma oxidation of the silicon substrate during the over-etch step. The plasma oxidation occurs by an ion-enhanced process with an activation energy of only 0.02 eV. This phenomenon is successfully modeled using the traditional Deal-Grove thermal oxidation model, with the inclusion of a depth-dependent reaction rate constant to incorporate the ion-enhancement effect. Plasma oxidation and silicon loss are reduced by using a shorter poly over-etch time, lower source and bias power, lower substrate temperature, and lower O2 flow. A viable poly-over etch process was developed which produced vertical poly profiles while reducing the silicon loss by 32%.
10:20 AM		PS2-MoM-7 Deep Cryo-Etching for Silicon Structures T.T. Tillocher, R.D. Dussart, X.M. Mellhaoui, P.L. Lefaucheux (GREMI - Orléans University, France); M.B. Boufnichel (ST Microelectronics - Tours, France); P.R. Ranson (GREMI - Orléans University, France) Semiconductor technology requires more and more accuracy in deep etching. The cryogenic process, which uses a SF₆/O₂-based chemistry and a cryogenically cooled wafer chuck, is promised to a great future since it provides smooth profiles and high etch rates. Indeed, this cryo-etching enables to realise with these good performances different patterns on silicon and SOI wafers (vias, trenches...) for a wide range of mask openings. This process is very accurate and fastidious to control since its efficiency results from a weak equilibrium between the simultaneous etching and passivation mechanisms. If the latter is broken, defects (black silicon, notching, bowing, undercut...) can appear and grow very quickly. We will detail these different defects and their conditions of appearance. A new cryogenic chuck, associating electrostatic clamping and a very good temperature uniformity , allows the etching of very uniform profiles all over the surface of the 6'' wafers. This is a critical aspect in the project since for certain projects the two sides of the wafer have to be etched separately and the profiles, depending on the temperature, must have the same shape from one side to the other. Parallel plasma diagnostics, such as actinometry, Langmuir probe, FTIR, interferometry, are the key to a better understanding of the process and hence to better control the process. We will present our last results on projects carried out in collaboration with STMicroelectronics/Tours. Some plasma measurements will be presented and correlated to the etching performances.
11:00 AM		PS2-MoM-9 Atomic-scale Simulations of Spontaneous and Ion-assisted Etching of Silicon D. Humbird, D.B. Graves (University of California, Berkeley) Molecular dynamics (MD) simulations model the phenomenon of thermal halogen atoms etching silicon spontaneously, and capture the atomic-scale mechanisms of Ar⁺ ions and neutral halogen atoms working together. Using improved interatomic potential energy functions for Si-F and Si-Cl, MD predicts steady halogen uptake and spontaneous etching as F and Cl atoms impact Si. At 300 K, the simulations agree semi-quantitatively with experimental measurements of total surface coverage, halosilyl group coverage, reaction probability, and etch product distribution. Etch products that remain weakly bound to the surface are detected in significant quantities. At higher temperature, agreement between simulation and experiment is qualitative; the simulation matches trends in reaction probability and etch product redistribution. Below 450 K, etch products form and promptly desorb. At higher temperatures, internal decomposition of the halogenated silicon layer dominates. The forthcoming phenomenological model of Winters et al. is based in part on some of the observations of our simulations¹. Significant etching enhancements are realized when simultaneous energetic Ar⁺ ions impact the halogenated Si surface. Si etch yields are in good agreement with experiments. The atomic-scale mechanisms of ion-enhanced etching are classified as enhanced spontaneous etching, chemically enhanced physical sputtering, and chemical sputtering. The primary effects of ions are to increase the local surface coverage of etchant species and to create products by inducing chemical reactions within the halogenated surface layer. Ion-assisted effects are most pronounced at low neutral/ion ratio and decline as this ratio increases. Explicit ion enhancements are greater for Cl than for F. ¹HF Winters, D Humbird, and DB Graves, in preparation (2004).
11:20 AM		PS2-MoM-10 X-ray Photoelectron Spectroscopy Analyses of SiGe and Si Surfaces after Selective Etching of Si S. Borel, O. Renault, J. Bilde (CEA-DRT-LETI, France) Recent progress in thin films epitaxial growth enables to consider new applications based on the realisation of Si/SiGe/Si heterostuctures. Indeed, lateral etching process can removed either SiGe or Si sacrificial layer and leads to a cavity between two single crystal-layers. The empty space thus created can be filled by an amorphous material in order to obtain a mono-layer on a insulator (Silicon On Nothing transistors). The selectivity of such processes is crucial for safeguarding of transistors actives parts dimensions. The Si removal etching process is as much more interesting because the selectivity to SiGe is almost infinite. The infinitely selective isotropic etching of Si to SiGe¹, obtained by using a combined addition of N₂ and CH₂F₂ into O₂ +CF₄ plasma was studied by ex-situ X-ray photoelectron spectroscopy. Etched Si and SiGe surfaces were analysed in terms of elemental composition, bonding states and oxide/oxyfluoride thickness by careful decomposition of Ge3d, Si2p, C1s and F1s core-level spectra. Both F1s and C1s spectra show up a component due to fluorocarbon polymeric groups, the quantity of which is 3 times higher on SiGe than on Si. At the same time on SiGe surfaces, F1s and Ge3d spectra reveal a large formation of Ge(O_x)F_y bonds compared to metallic Ge, whereas SiF_x are almost absent. We conclude that a layer formed by a fluorocarbon polymer and Ge oxyfloride induces a total passivation of the SiGe when subjected to the N₂ /CH₂F₂/O₂+CF₄ plasma. The precise role of the CH₂F₂ will be tentatively interpreted on the basis of other etching results with similar inverted selectivities. ¹ S. Borel et al., Jpn. J. Appl. Phys. (accepted).