AVS1997 Session TF-TuM: ULSI Interconnects and Metallization - I

Tuesday, October 21, 1997 8:40 AM in Room B1/2

Tuesday Morning

Start	Invited?	Item
8:40 AM		TF-TuM-2 Production of Low Defect Density Ultrathin Multilayer Coatings for ULSI Applications Using an RF Inductively Coupled Ion Beam Deposition System A.V. Hayes, R. Rajan, V. Kanarov, H. Hegde, J Jacobs, G. Treygor, B. Druz, R. Fremgen, A. Navy (Veeco Instruments) Ion beam sputter deposition techniques have been found to produce thin film coatings with very desirable properties for ULSI applications, including Extreme Ultraviolet (EUV) Reticle Masks and MRAM (Magnetic RAM) devices. The design and characterization of a low defect density Mo/Si Multilayer (ML) deposition system for the fabrication of EUV masks will be described in detail. This system was developed for, and in cooperation with, Lawrence Livermore National Laboratory and is capable of providing less than 1% nonuniformity for 200 mm wafers. Characterization to date has been done with 150 mm diameter Si wafers to allow for in-situ characterization of defect densities. Complete, 81 layer, high reflectance Mo/Si ML coatings are deposited using a 1.8 MHz RF inductively coupled ion beam sputtering source and a two sided target assembly. Extremely uniform, high reflectance coatings with very low defect densities¹ are being routinely produced by this system. Defect densities have been reduced by five orders of magnitude compared to plasma sputter deposited coatings. Features of the equipment which provide for defect reduction and monitoring, high area uniformity, high film purity, and precise control of layer thicknesses are emphasized. Applications of ion beam sputter deposition for other ULSI thin film devices, such as MRAMs, will be discussed also. ¹S.P. Vernon, et al, Optical Society of America Trends in Optical Photronics, 4 (1996).
9:00 AM	Invited	TF-TuM-3 How the PVD / CVD Metal Equipment Supplier Industry will meet the sub 0.25 µm Challenge M.A. Biberger (Varian Assoc.) With decreasing device dimensions and increasing device density of integrated circuits, interconnects have become a significant factor affecting the overall chip performance and cost. In the industry a clear trend can be observed towards a) more interconnect layers (five and more in logic devices and up to three in memory devices), b) lower overall temperatures (less than 400° C), c) change in metalization trends from CVD W plugs to aluminum planarization for cost and performance reasons and d) introduction of new materials such as cobalt and molybdenum for silicides in conjunction with ultra shallow junctions and copper as the wiring material on the upper layers of high performance CPU’s. In addition to the issues mentioned above, the PVD / CVD metal supplier industry is faced with new inter layer dielectric (ILD) materials such as fluorinated SiO₂ or organic dielectrics (low ε materials) and new interconnect schemes such as dual damascene and chemical mechanical polishing (CMP). In order to meet those challenges new metalization schemes and technologies have to be developed. In the present paper ionized PVD deposition technologies for sputtering contact and barrier metals (Ti/TiN and Ta/TaN), aluminum and copper will be presented. aluminum and copper planarization technologies such as reflow, low pressure, high pressure etc. will be introduced and their compatibility with low ε ILD’s and dual damascene structures discussed. New metalization schemes such as PVD and CVD on separate platforms and PVD / CVD combined on one platform for liner / barrier, aluminum and copper, will be discussed with respect to process feasibility and from a cost of ownership (CoO) point of view.
9:40 AM		TF-TuM-5 Re-Emission of Sputtered Refractory Metals during Deposition R.N. Tait (Alberta Microelectronic Centre, Canada) Refractory metals are of interest for use in diffusion barriers, adhesion layers, and seed layers in ULSI metalization. An interesting feature of some of these materials is the apparent re-emission of some of the deposited flux during sputtering. This can be useful in depositing conformal layers in high aspect ratio contacts and vias. Overhanging structures have been used to study re-emission in Ti, TiW, W, and Ta sputtering. While Ti shown negligible re-emission under typical sputtering conditions, both W and Ta show noticable film deposition in regions obstructed from direct flux. TiW alloy sputtering shows evidence of the largest amount of re-emitted flux. Sputtering conditions from 5 to 15 mT with power densities from 10W/cm2 to 35W/cm2 were studied, without significant change in the re-emission flux. Variation of substrate temperature, and substrate bias of +/- 50V was also not found to cause a measurable change in the re-emission characteristics.
10:00 AM		TF-TuM-6 Al Diffusion into Atomically Clean and Oxidized TiN(100) J.S. Lin, B.M. Ekstrom, J.A. Kelber (University of North Texas) We report Auger, LEED studies of the thermally activated diffusion of Al adatoms into atomically clean and partially oxidized TiN(100). TiN is heavily used as a diffusion/adhesion barrier in the metallization of microelectronic devices. Our results show that on atomically clean TiN, Interstitial diffusion occurs at temperatures as low as 420 K. In contrast, Al reacts with partially oxidized TiN(100) to form an oxidized Al adlayer which Auger spectra indicate is similar to Al₂O ₃. The oxidized adlayer is stable on TiN to temperatures in excess of 920 K in UHV. Al₂O ₃ deposited on clean TiN(100) exhibits the same stability. This behavior is in contrast to Cu to TiN, which exhibits no significant diffusion into atomically clean polycrystalline samples at temperatures below 720K. The data indicate that diffusion properties of TiN are critically affected by monolayer concentrations of surface impurities. Device processing which involves air exposure of TiN prior to Al or Cu-Al alloy deposition will be an effective diffusion barrier to Al. However, in-situ processing with no air exposure will results in significant leakage currents in the case of Al metallization.
10:20 AM		TF-TuM-7 A Novel Approach in the Activation of TiN for Highly Selective Electroless Copper Deposition Studied by Ex Situ Non-Contact AFM and XRD S.F.Y. Li (National University of Singapore); L.H. Chan (Chartered Semiconductor Manufacturing Ltd., Singapore); H.T. Ng (National University of Singapore) A simple and novel method of activating TiN for highly selective electroless copper deposition via HF-treatment in the absence of an adhesive/catalytic seeding layer was successfully demonstrated. X-ray diffractometry was used to analyse the initial chemical compositions of such an activated substrate which revealed no Cu outplating on TiN. Subsequent electroless deposition led to Cu deposits that exhibited qualitatively good adhesion and a characteristic metallic finish. The dynamic morphological evolution of such a process was readily monitored by ex situ non-contact atomic force microscopy which featured interesting deposition phenomena whereby TiN grains were found to serve mainly as nanocathodes in the initial instantaneous nucleation process. Preferential lateral and vertical growth of Cu grains were found to interplay between themselves during the bulk stage deposition; exhibiting "Stranski-Krastanov" like growth mode. Total plug fill was also achieved using the same activation approach. The mechanistic nature of such a deposition process appeared to proceed along the line of an electrochemical one as suggested by the observed submicrometer surface morphological evolution.
10:40 AM		TF-TuM-8 The Effect of Process and Hardware on Ta Phase Formation of Ta Thin Film Deposited by Sputtering G. Xu, K. Ashtiani, T. Licata (Materials Research Corporation) For some CMOS device application, ß-Ta films are utilized because high resistivity (ρ = 180 µΩ-cm) is requred. However, the lower resistivity α-Ta film (ρ = 30 µΩ-cm) can unintentionally form under some conditions. For instance, both phases have been observed in Ta films deposited on SiC-coated substrates using a DC magnetron sputtering system (MRC Solarus^TM). The α-Ta typically forms in a ring-pattern (called α-ring) near the wafer edge with the rest of the wafer mainly being ß-Ta, resulting in poor R_s uniformity (as much as >30%, 1σ). In order to understand and inhibit the α-ring formation, we have systematically studied the effects of process and hardware variations on the Ta phase formation. The experimental results show that the extent of the α-ring increases with increasing ICP (inductively coupled plasma) soft etch clean time prior to deposition, and with deposition temperature and power. In particular, the ICP soft etch prior to deposition has been identified as a dominant factor for the α-ring formation. Sheet resistance, XRD, TEM and SIMS studies have shown that the sputtering of residual Ta from the clamp ring during soft etch process provides heterogeneous nucleation sites for the α-Ta formation during the subsequent Ta deposition. Without the Ta nucleation sites created during ICP soft etch process, no α-Ta formation is observed for all the Ta deposition. Moreover, the growth of the α-ta phase is thermally and kinetically activated by the temperature and/or power during the subsequent Ta deposition. Based on this understanding, a new set of hardware for the Solarus^TM has been designed and evaluated, and a new process has been developed. The optimized hardware and process improved the within wafer R_s non-uniformity from >30% (1σ) to 2% (1σ), and improved wafer to wafer R_s non-uniformity from 9.28% (HL) to 0.34% (HL) over one hundred consecutively processed wafers. The hardware set and process are in use for high volume production now.
11:00 AM		TF-TuM-9 Temperature, Pressure, and Substrate Dependence of the Beta to Alpha Phase Transition of Sputtered Tantalum D. Lee, J. Griswold, E. Klawuhn (Varian Associates) The sputtering of beta tantalum thin films has been used for IC resistor circuits, IC capacitors, corrosion resistance, and potential diffusion barrier for copper in IC circuits. The high temperature stability and corrosion resistance of beta tantalum are desirable for IC circuits. Bulk tantalum has an alpha (bcc) crystal structure. The beta tantalum tetragonal structure is not found in bulk tantalum. Sputtered tantalum films can have alpha, beta, or a mixture of alpha/beta. Numerous papers have attributed the different crystal structures to impurities, vacuum condition, and substrate type. The effect of deposition temperature, pressure, and substrate on the crystal structure of sputtered tantalum films from a planar magnetron cathode was investigated. The films had a structure of beta tantalum at low temperatures and transition to alpha at high temperatures. The beta tantalum films were strongly <002> oriented crystal structure. The transition temperature from beta to alpha was dependent on deposition temperature, argon pressure, and substrate type. On SiC coated substrates the transition occurred at a lower temperature than on wafers coated with thermal oxide (SiO₂). Both x-ray diffraction and sheet resistance analysis confirm the transition from beta to alpha.
11:20 AM		TF-TuM-10 XPS Characterization of the Oxidation of Electroplated and Sputtered Copper Surfaces E. Apen, J. Sellers (Motorola, Inc.) Requirements to improve the electrical performance of dimensionally scaled interconnect systems has led to evaluations of pure copper as an on-chip metallization material for semiconductor logic, memory and radio frequency circuit applications. Interest in copper is primarily driven by its low electrical resistivity and high melting point properties which is expected to translate to reduced signal transmission delays, decreased power dissipation and increased reliability to electrical and thermal stress migration failures compared to aluminum based interconnect materials. Despite these and other benefits, the use of copper introduces new materials processing and performance concerns such as oxidation. The formation of chemically and mechanically unstable surface layers can adversely impact adhesion to surrounding passivation layers. X-ray photoelectron spectroscopy (XPS) was used to study the surface oxidation of sputtered and electroplated copper films following exposure to ambient air and chemical processing reagents used during the fabrication of interconnect structures. Exposure of both sputtered and electroplated copper films to ambient air and deionized (DI) water resulted in the formation of thin copper oxide layers, the topmost layer containing Cu²⁺ oxide species, and the next containing Cu⁺ oxide. Oxidation was more rapid for electroplated compared to sputtered copper films as measured by the total oxygen uptake rate using XPS. For electroplated copper films, oxygen uptake was slower as a result of exposure to DI water compared to ambient air treatments. Electroplated copper films exposed to common wet chemical etchants also show indications of oxidation of the copper surface region with evidence of mechanical instability between the formed oxide and underlying copper film, resulting in adhesion loss. A method for the removal of the oxide layer has also been investigated to improve adhesion performance to overlying passivation films.
11:40 AM		TF-TuM-11 Thermal Stability of NiSi in Deep Submicron Polysilicon Lines M.C. Poon (Hong Kong University of Science & Technology); F. Deng (University of California, San Diego); M. Chan (Hong Kong University of Science & Technology); H. Wong (City University of Hong Kong); J.K.O. Sin (Hong Kong University of Science & Technology); S.S. Lau (University of California, San Diego); C.H. Ho (Hong Kong University of Science & Technology) Silicides have been widely used to reduce the parasitic resistances in VLSI circuits, especially as self-aligned-silicide technology to reduce the sheet and contact resistance of the source, drain and poly-silicon (poly-Si) gate regions in deep submicron CMOS devices. Recently, nickel-monosilicide (NiSi) has been shown to be a promising silicide due to its low resistivity, less Si consumption, single step annealing and low formation temperature. This work presents a first study of the thermal stability of NiSi on B, As, P and in-situ B-doped deep submicron poly-Si lines after 400-800oC and 1 hour long time annealing. 260 nm of LPCVD undoped poly-Si film was deposited onto 95nm of thermal oxide. The poly-Si films were doped by 1 x 10¹⁶/cm² and 50 keV B, As, P implant, and in-situ 630oC B diffusion. The samples were then annealed at 1000oC/20seconds and 900oC/20minutes respectively. Poly-Si lines with length of 50 microns and widths of 0.05-2.5 microns were formed by reactive ion etching. 27 nm of Ni film was deposited by electron beam evaporation and 60nm of NiSi was formed after RTA at 600oC for 40 seconds. For all the poly-Si lines, the sheet resistances of NiSi are found to be stable with the annealing temperatures after the 500, 550, 600, 650 and 700oC/1 hour annealing. For some samples, the resistances are stable with temperature even after 750oC/1hour annealing. The resistivity of NiSi remains constant for poly-Si lines with linewidths as narrow as 0.15 micron even after 650-700oC/1 hour annealing. For the B, As, P and in-situ B-doped samples, the experimental resistivities are around 15.0, 14.7, 12.7 and 13.9 micro-ohm-cm respectively. RBS studies of the samples also confirm that the NiSi layer is stable on the poly-Si even after 700oC/1hour annealing. A model is proposed to correlate the good thermal stability with the dopants and large poly-Si grains before the annealing. The results can widen the thermal budget and process tolerance, and suggest that NiSi is a very promising contact material for future ULSI devices.