ALD2023 Session AA2-WeM: Memory DRAM

The ALD technology has been widely utilized in modern nanometer scaled electronic due to the excellent uniformity, conformality, and thickness controllability.
The unique advantage of ALD is the “tune-ability” of the materials thanks to the freedom of changing concentration of elements and crystalline states. It makesALD films as versatile functional and structural materials with the capability to optimize electrical and physical properties for multiple applications spanning from logic to memory.

In DRAM storage node capacitor, without ALD technique, the metal electrode and the dielectric material cannot be deposited uniformly, considering the height of DRAM capacitor is more than 1μm, while the top opening of capacitor is just a few tens of nanometers. The aspect ratio of 3D NAND is even more severe than DRAM capacitor. Very conformal deposition with good uniformity is required in several critical steps, such as O-N-O charge trapping layer formation inside plug and thin metal deposition in replacement word line gates. In logic technology, Hf-based high K dielectric layer paired with ALD deposited work function metal has still been used for gate stacks since it revolutionized the transistor performance two decades ago. The low-k but robust SiOC film is key element of enabling gate pitch scaling and epi SD formation of Finfet devices.

As DRAM and NAND reaches sub-10nm node and 1000 layers respectively, many industries are afraid that the evolutionary approaches to extend the scaling would not work anymore. Therefore, revolutionary path technology such as stacked DRAM is taking more attention more than ever. The new revolutionary platform will require new devices, new integration schemes, and new materials. The requirement for new materials is expected to be very challenging, and more importantly, may require very different properties never asked in the past.

In this talk, I would like to illuminate how ALD materials have been utilized in ultra-scaled electrical devices, especially for DRAM and NAND. Then I will introduce emerging revolutionary memory technologies on the horizon. I also discuss about the requirement of structural and functional ALD materials to enable the future memory devices.

Lower leakage at low EOT is a requirement for DRAM application. Ferroelectric/antiferroelectric HfZrO₄ films have shown high-k at 10 nm but as the films are scaled, the dielectric properties of the films decrease^2,3. The key to low EOT is to find a material with high-k at 5 nm or sub-5nm thickness with low leakage.

Metal-Insulator-Metal capacitors were[MB1] [#_msocom_1][HK2] [#_msocom_2] fabricated with HfZrO₄ thin films. 5nm HfZrO₄ was grown by ALD on sputtered TiN and W substrates at 275 °C using tetrakis(dimethylamino)hafnium (TDMAH), tetrakis(dimethylamino)zirconium (TDMAZ) (STREM) and H₂O₂ (Rasirc). HfZrO₄ thickness was determined by cross-sectional TEM and were between 5.0 and 5.5 nm. TiN and W electrodes were deposited by magnetron sputtering. Top electrodes were patterned by photolithography. Samples were annealed in N₂ at 600°C for 2 minutes. Control samples with H₂O were also fabricated for comparison with TiN and W electrodes.

C-V measurements were performed for HfZrO₄ films deposited with HOOH (Fig 1). Control samples made with H₂O were used for comparison. For HfZrO₄ using HOOH with TiN electrodes, there are 4 switching peaks in the C-V consistent with presence of the AFE phase (Fig. 1a). HZO with 1:1 Hf:Zr ratio is known to show FE switching; however, use of HOOH precursor may lead to Ti diffusion from TiN substrate into the HZO film. Small amounts of Ti are known to stabilize the AFE phase in HZO⁴. To study the impact of metal electrodes, samples with sputtered W electrodes were fabricated since W is known to show enhanced FE/AFE switching in HZO films. Undoped HZO with 1:1 Hf:Zr and W electrodes grown with HOOH (Fig 1b) shows only FE switching and no AFE switching.

When using HOOH, both the samples with TiN and W electrodes show record high capacitance for 5 nm films (> 10 mF/cm²). Extrinsic contributions to k value from domain walls play an important role. A higher vol% of domain walls may be key to the extremely high-k observed in films fabricated using HOOH vs H₂O. A heuristic model of domain walls show surpassed polarization which are very susceptible to eternal stimuli and thus show high permittivity (Fig 2).

For DRAM application, it essential to have high-k near 0V. Both capacitors fabricated using HOOH show record high-k at (~58 with TiN, ~88 with W) 5 nm thickness which results in ultra-low EOT of ~3.5 A with TiN and ~2.5 A with W (Fig 3 a). The sample with W electrodes shows higher leakage in comparison with samples with TiN electrodes (Fig 4). This may be in part due to higher crystallinity in HfZrO₄ imparted by the W electrodes since major leakage pathway in crystalline HfZrO₄ thin films is grain boundaries.

The semiconductor industry is expanding toward artificial intelligence (AI), cloud data centers, and high-bandwidth memory processing in memory (HBM-PIM). In these fields, atomic layer deposition (ALD) is indispensable for adjusting thickness control and high step coverage. The design of high-performance field-effect transistors (FETs) with low-voltage operation, high field-effect mobility (µ_FE), and low leakage current have propelled the development of relevant fields. Oxide-based thin-film transistors (TFTs) are garnering increased attention owing to their steep sub-threshold swing (SS) and extremely low leakage current. Although oxide-based TFTs are known to restrict µ_FE (~30 cm²/(V·s)), numerous research groups have demonstrated exceptional µ_FE values exceeding 100 cm²/(V·s). However, the high stability of oxide-based TFTs is another prerequisite for their widespread application. Achieving high mobility and stability is challenging as the overall properties of oxide-based TFTs are compromised. Doping at oxide semiconductors with anions may resolve the issue of uniformity. Previous studies have confirmed that nitrogen (N) doping is promising for regulating oxygen vacancy (V_O) defect concentration. Because the atomic radius of N is comparable to that of oxygen (O), doped N is a suitable replacement for V_O defect sites.

In this work, we deposited plasma-enhanced ALD (PEALD)-IGZO TFT with O₂ plasma reactant using the super-cycle method at a set temperature of 200℃. For the In₂O₃, Ga₂O₃, and ZnO deposition, (3-dimethylaminopropyl)dimethylindium (DADI), trimethylgallium (TMGa), and diethylzinc (DEZ) precursors were utilized. To gain insight into N dopants for each cation of PEALD-IGZO, a nitrous oxide (N₂O) plasma reactant was selectively applied for each PEALD cation cycle. Our strategy here, the N₂O plasma reactant, is completely different from plasma treatment in that it participates in chemical reactions during the ALD process. Using a combinatorial study of experimental analysis and theoretical interpretation, the N-doping mechanism and the associated enhancement in the performance and stability of PEALD-synthesized IGZO TFTs were investigated. Based on these insights, high-performance with stable PEALD-IGZO TFTs could be obtained with minimal V_TH shifts of 0.35 V in difficult PBTS environments (temperature stress: 95℃, field stress: 2 MV/cm) despite a high µ_FE of 106.5 ± 2.7 cm²/(V·s). Our results provide insights into the atomic precision optimization of the performance and stability of IGZO TFTs.

Oxide semiconductors containing indium oxides (InOx), such as IGZO, IGTO, and ITO, have been attracting attention for various applications, such as field effect transistors (FETs), catalysts, and active layers of memory devices because of their outstanding properties, such as high mobility, low off-current, and excellent uniformity. Among the oxide semiconductors, indium oxide is crucial because the electron carrier transport path mainly consists of In 5 s orbitals. The study of crystalline mechanisms and preferred crystal orientation of indium oxide were widely conducted because the characteristics of indium oxide, such as electrical and optical properties and reliability, are affected by InOx film crystallinity. Mengwei Si et al. reported an InOx channel FET with a thickness of 0.7 nm that can be applied to extended devices such as monolithic three-dimensional (3D) integration and dynamic random access memory (DRAM)^[1]. However, the electrical properties of FETs were inferior because of the amorphous properties of 0.7nm thick InOx thin film. Since a constant thickness is required to crystallize the InOx film, the study of the critical thickness of crystallization is needed for further applications of InOx^[2].

In this study, we developed a new liquid indium precursor with an ALD window from 200 to 350℃. To the best of our knowledge, this 350 ℃ is the highest ALD InOx deposition temperature using ozone as a reactant without impurities such as carbon and nitrogen. According to various analysis methods such as XRD and GIWAXS, 3 nm is the critical thickness of crystalline InOx films deposited by the ALD method using the SBIP-03 precursor. The authors studied the crystallinity effect of InOx in terms of thickness, deposition temperature, and post-annealing process. The crystallized 3 nm thick InOx film is adopted as the channel layer of FET. The FET has excellent transistor characteristics in terms of field-effect mobility (39.3 cm²/Vs), threshold voltage (-0.7 V), subthreshold swing (310 mV/dec), and on-off current ratio (3.3x10⁷).

[1] Si, Mengwei, et al. Nano Letters 21.1 (2020): 500-506. https://doi.org/10.1021/acs.nanolett.0c03967

[2] Macco, Bart, et al. Journal of Applied Physics 120.8 (2016): 085314. https://doi.org/10.1063/1.4962008