AVS2018 Session EM+AM+NS+PS-MoA: Atomic Layer Processing: Selective-Area Patterning (Assembly/Deposition/Etching)

As devices are scaled to sub 5nm, it is critical to prepare clean and atomically flat surfaces. The traditional aqueous HF clean for removal of native Si oxide suffers from an inevitable air exposure resulting in re-oxidation of the Si surface as well as carbon contamination. The Siconi™ process is a dry clean which utilizes a low temperature (<30C) NF₃/NH₃ based plasma to selectively etch the native oxide layer on Si without etching the underlying Si layer. However the Siconi™ process leaves behind a (NH₄)₂SiF₆ salt which must be removed in a subsequent anneal. In this work we present a dry clean which eliminates (NH₄)₂SiF₆ salt formation and provides a surface which is just as flat as with the traditional aqueous HF clean.

Selective thin film processes, including atomic layer deposition, have the potential to enable next-generation manufacturing and patterning at the 5 nm node and beyond, with direct applications in the nanofabrication of functional layers such as gate dielectrics, metal contacts, and capping/barrier layers. Well-known for its ability to deposit atomically thin films with Å-scale precision along the growth direction and conformally over complex 3D substrates, atomic layer deposition (ALD) has emerged as a key nanomanufacturing process. In this regard, the range and scope of ALD-based applications and capabilities can be substantially extended by also controlling the in-plane growth—a timely and significant development that can be realized via area-selective deposition processes that depend on the chemical composition of the underlying surface. In this presentation we will review the approaches that have been taken to achieve area-selective ALD, and we shall highlight both the strengths and shortcomings of these approaches. We will also discuss our efforts to achieve selective deposition that exploit competitive interactions—these interactions can occur both on the surface(s) where the film is, or is not, being deposited, and in the gas phase. In our approach we couple well controlled experiments that involve in situ surface analysis using techniques such as X-ray photoelectron spectroscopy and high level quantum chemistry calculations of specific and non-specific binding of molecules to target surfaces. We find that this combination of techniques is capable of shedding considerable light on deposition processes that are both potentially fast and leave no trace of their use in guiding thin film deposition to those areas where growth is desired.

Copper (Cu) is a popular interconnect material for high density ICs, large area TFT LCDs, and many advanced electronic and optical devices. Since Cu does not form volatile products under the conventional plasma etching condition, the only available method in preparing fine lines is the chemical mechanical polishing (CMP), i.e., the single or dual damascene, method. The author’s group has invented a new plasm-based Cu etching method that has a high rate at room temperature (1). This method has been successfully demonstrated in defining submicron lines for IC chips as well as being used in the large area TFT LCDs (2). However, this are few papers on defining the sub 0.5 micrometer Cu line using this new etch method. The lifetime of the plasma-etch Cu line on the flat and stepped surfaces has been studied with the electromigration method (3,4). However, the pattern size effect is rarely discussed.

In this talk, the author will discuss the process that can be used to prepare sub 0.3 micron dimension Cu patterns. The success of this process is due to the simultaneous Cu conversion reaction and sidewall passivation. In addition, the failure mechanism of the plasma-etched Cu line over a large range of line widths, i.e., from 1.5 to 30 micrometers, will be examined based on the electromigration test result. In summary, Cu lines prepared from the plasma-based process can be reliably applied in the many nano electronic and photonic products.

1. Y. Kuo and S. Lee, Jpn. J. Appl. Phys.39(3AB), L188-L190 (2000).

2. Y. Kuo, Proc. 16^th Intl. Workshop on Active-Matrix Flat Panel Displays and Devices, 211-214 (2009).

3. G. Liu and Y. Kuo, J. Electrochem. Soc., 156(6) H579-H584 (2009).

4. C.-C. Lin and Y. Kuo, J. Vac. Sci. Technol. B, 30(2), 021204-1 (2012).

We review our recent studies of contacts to a variety of chalcogenide semiconductors, including few-layered molybdenum disulfide and tungsten diselenide, as well as the phase-change material germanium telluride. In some cases, diffusion of a transition metal into the semiconductor has been correlated with an especially low contact resistance. For example, annealing silver contacts on field effect transistors fabricated from few-layered molybdenum disulfide resulted in a reduction in contact resistance by a factor of 4–5 to 0.2–0.7 kOhm-µm, while the ON/OFF current of the device remained high. Diffusion of silver into molybdenum disulfide was confirmed by secondary ion mass spectrometry. On the other hand, nickel appears to be even more soluble in molybdenum disulfide (as observed by Auger electron spectroscopy), but annealing nickel contacts resulted in an increase in resistance. For the phase-change material germanium telluride, incorporation of iron seems to play a role in achieving a low contact resistance of 0.004 Ohm-mm in annealed Au/Fe/Sn/p-GeTe contacts. Diffusion of iron into germanium telluride at a low but detectable level was found beneath a narrow-gap tin telluride interfacial reaction product using energy dispersive spectroscopy in the scanning transmission electron microscope. Using only iron or tin without the other did not result in such a low contact resistance. The influence of iron on the electronic properties of germanium telluride is now under study. Besides diffusion of metals into the semiconductor, we also present cases of reactive contacts to germanium telluride, whereby the contact resistance is greatly increased by interfacial reactions that led to the formation of a new phase (especially nickel tellurides and platinum tellurides). Finally, we consider the influence of surface diffusion on quasi van der Waals epitaxy of metals on layered transition metal dichalcogenides.

For device back end of line processing, there is a need to deposit conformal barrier layers on high aspect ratio 3D architectures via low-T ALD. Titanium nitride (TiN) and tantalum nitride (TaN) have been studied as diffusion barriers to WF₆ during W metal fill and to Cu, as Cu can readily diffuse, causing device reliability issues. Organometallic-grown films are required when Cu is present to prevent etching, however, metal halide precursors are preferred for gate stack applications as films typically contain lower levels of carbon and oxygen contamination; this has been correlated with improved film conductivity. This work aims to deposit thermal ALD titanium nitride and tantalum nitride utilizing anhydrous N₂H₄ at lower temperatures than previously reported with NH₃ while still maintaining good film properties.

In this study, low temperature thermal ALD TiN_x from anhydrous N₂H₄ vs. NH₃ and TiCl₄ was performed on degreased and UHV annealed SiO₂/Si substrates at temperatures of 300°C and 400°C. The deposited films were studied using x-ray photoelectron spectroscopy (XPS) and atomic force microscopy (AFM). TaN_x films were grown at 150°C utilizing N₂H₄ and tris(diethylamido) (tertbutylimido)tantalum (TBTDET) and characterized similarly. In addition, the resistance of air-exposed ultra-thin films was measured using a 4-point probe technique. Resistivities were estimated from thicknesses obtained from cross-sectional scanning electron microscopy (SEM) images. First, saturation dosing was performed to determine optimal half-cycle pulses of TiCl₄ and N₂H₄. After TiN_x ALD cycles, AFM imaging showed uniform deposition with sub-nanometer RMS surface roughness. The corrected and normalized XPS showed near stoichiometric Ti₃N₄ with low O and C and ~10% Cl. There was approximately 2x more O and C and 50% more Cl in NH₃ grown films at 400ºC. N₂H₄ films exhibited lower resistivities (359 vs. 555 µohm-cm), attributed to this lower contamination and likely better nucleation density. For TaN_x films, XPS of 15 cycles ALD TaN_x films resulted in 9% O and 4% C and had a Ta/N ratio of 4/5. Analysis on the Ta 4d peaks confirmed nucleation after the initial exposure of TBTDET (Si-O-Ta formation) based on the Ta 4d 5/2 peak BE of ~231.5 eV. A chemical shift to 229 eV was observed upon forming Ta-N bonds. Resistance measurements indicated insulating films consistent with the formation of Ta₃N₅. In summary, N₂H₄ grown TiN_x films showed lower resistivities with fewer impurities. The anhydrous N₂H₄ chemistry was extended to an organometallic Ta precursor, in which nearly stoichiometric films were deposited with low contamination at a modest substrate temperature of 150ºC.