AVS2008 Session NM+MS+NS+NC-WeM: Beyond CMOS

Wednesday, October 22, 2008 8:00 AM in Room 309

Wednesday Morning

Start	Invited?	Item
8:00 AM	Invited	NM+MS+NS+NC-WeM-1 Excitronics: Excitonic Circuits for post-CMOS Electronics J.-U. Lee (University of Albany) In this talk, I will describe the properties of excitons in one-dimensional semiconductors that make them attractive as a post-CMOS state variable. The essential properties needed for any new state variable are: creation, transport and detection. These properties will be described for excitons created within single-walled carbon nanotube p-n diodes, one of the most fundamental of all electronic devices. The p-n diodes are formed along individual nanotubes and can show ideal diode behavior, the theoretical limit of performance for any diode. I will describe their dc, optical and the interplay between transport and optical properties. As an optical detector, these diodes are extremely sensitive and are able to probe the complete excited states of SWNTs, including the lowest exciton transition and the continuum. Based on these results, we extract properties that are meaningful for electronic applications, including exciton binding energy, transport, and optical cross section. This work was supported by the NRI/INDEX program and the University at Albany.
8:40 AM	Invited	NM+MS+NS+NC-WeM-3 Magnetism in Mn Ion Implanted Si C. Awo-Affouda (Naval Research Laboratory); M. Bolduc (Tekna Plasma Systems, Inc.); V.P. LaBella (University at Albany-SUNY) Magnetic semiconductors hold great potential to produced spin based devices with increased functionality and performance. Making Si ferromagnetic via ion implantation of Mn will aid in integrating such devices with conventional semiconductor manufacturing. Although observations room temperature ferromagnetic phases in Mn-doped Si have been reported by several groups, the origin of the ferromagnetism remains elusive.^1-3 We investigate the influence of annealing on the lattice disorder and dopant distribution of Mn ion implanted Si samples. These depth profiles reveal a strong influence of annealing temperatures on the magnetization of the samples. Specifically, above 800°C a drastic drop in the Si lattice disorder is observed which is coincident with a decrease in magnetization. Furthermore the correlation of the structural and magnetic properties suggests that the magnetization of the samples originates from Mn atoms located in the least damaged implanted region.⁴ Finally, analysis of the magnetization of the samples reveals the presence of superparamagnetic phases magnetically active at low temperatures. ¹ Bolduc et al., Phys. Rev. B, 71, p.033302 (2005) ² Yoon et al., J. Magn. Magn. Mater./331, p.693 ³ Kwon et al. Solid State Commun., 136, p. 257 (2005) ⁴ Awo-Affouda et al. J. Vac. Sci. Tech. A, 25, p. 976 (2007).
9:20 AM	Invited	NM+MS+NS+NC-WeM-5 Graphene Electronic Devices A. MacDonald, S.K. Banerjee, L.F. Register, M. Gilbert, J.-J. Su, R. Bistritzer, H. Min (University of Texas at Austin) Graphene is an atomically two-dimensional material which is described by ultra-relativistic quantum mechanics. I will review progress toward graphene-based electronic devices based on both conventional ideas and on the properties of novel broken symmetry states which might be realized when two graphene layers are separated by a nm scale dielectric barrier. The absence of a mass (a gap) in ultra-relativistic quantum mechanics presents a challenge in adopting conventional device physics to this material. I will discuss progress in inducing gaps by making narrow graphene ribbons or by places graphene bilayers in external electric fields. The broken symmetry which might be realized in systems with two separated graphene layers is one in which phase coherence is established spontaneously between separate layers. These states are counterflow superfluids in which current can flow in opposite directions in the two layers without dissipation. I will discuss some ideas for electronic devices based on the properties of these unusual superfluids.
10:40 AM	Invited	NM+MS+NS+NC-WeM-9 Intrinsic and Extrinsic Limits of Charge Carrier Mobility in Graphene M.S. Fuhrer (University of Maryland) Graphene, a single atom-thick sheet of graphite, is a zero-gap semiconductor with an unusual linear dispersion relation (analogous to the Dirac equation for massless relativistic particles) and a density of states that vanishes at a singular point. Due to the high conductivity and charge carrier mobility, graphene is being considered for a number of applications ranging from transparent, conducting thin films to high-speed electronics. Here I will discuss experiments performed on atomically-clean graphene on SiO₂¹ in ultra-high vacuum to determine the intrinsic and extrinsic limits of mobility in graphene,^2,3 which point out both the promise of the material as well as the technological challenges that lie ahead in realizing better graphene samples. Intrinsic scattering by the acoustic phonons of graphene³ limits the room-temperature mobility to 200,000 cm²/Vs at a carrier density of 10¹² cm^-2, higher than any known material. However, conduction in current graphene samples is limited almost entirely by extrinsic scattering due to charged impurities in the substrate² and substrate polar optical phonons³ currently, pointing out the importance of substrate engineering for improving graphene devices.⁴ I will discuss the implications for the future of graphene technologies in terms of the manufacturing methods for large-area graphene currently being explored, such as solution processing methods, chemical vapor deposition, and epitaxial growth on metals and insulators. ¹ “Atomic Structure of Graphene on SiO₂,” Masa Ishigami, J. H. Chen, W. G. Cullen, M. S. Fuhrer, and E. D. Williams, Nano Letters 7, 1643 (2007). ² “Charged Impurity Scattering in Graphene,” J. H. Chen, C. Jang, M. S. Fuhrer, E. D. Williams, and M. Ishigami, Nature Physics 4, 377 (2008). ³ “Intrinsic and Extrinsic Performance Limits of Graphene Devices on SiO₂,” J. H. Chen, C. Jang, S. Xiao, M. Ishigami, M. S. Fuhrer, Nature Nanotechnology 3, 206 (2008). ⁴ “Printed Graphene Circuits,” Jian-Hao Chen, Masa Ishigami, Chaun Jang, Daniel R. Hines, Michael S. Fuhrer, and Ellen D. Williams, Advanced Materials 19, 3623 (2007).