AVS2004 Session EM-TuM: Contacts and Metallization

Tuesday, November 16, 2004 8:40 AM in Room 304B

Tuesday Morning

Start	Invited?	Item
8:40 AM		EM-TuM-2 Near-Surface Defects and Schottky Barrier Formation at Au/ZnO(000-1) Interfaces H.L. Mosbacker, Y.M. Strzhemechny, P.E. Smith, B.D. White (The Ohio State University); D.C. Look (Wright State University); L.J. Brillson (The Ohio State University) ZnO is rapidly emerging as a promising optoelectronic material, particularly for short wavelength light emitters. Key to such devices are an understanding and control of the metal-ZnO Schottky contact, yet clean interfaces and the role of extrinsic ZnO interface states in UHV barrier formation are relatively unexplored. We have used a combination of nanoscale depth-resolved electron-excited luminescence (NDREEL) spectroscopy, Auger electron spectroscopy (AES), atomic force microscopy (AFM), low energy electron diffraction (LEED), and current-voltage (I-V) measurements to correlate changes in Au/ZnO contacts with near-interface states and surface chemical structure. Eagle-Picher ZnO single crystals grown by chemical vapor transport and cleaned with organic solvents exhibit only minor contamination and a hexagonal LEED pattern. AFM revealed micro-pits known to render the metal/ZnO contacts ohmic. Subsequent exposure to a remote O/He plasma in a UHV-linked chamber resulted in a significant increase of rms surface roughness but an improved LEED pattern. AES surface stoichiometry improved after O/He plasma treatment with the O/Zn ratio increasing from ~ 0.55 to ~ 0.76. I-V of the in situ-evaporated Au/ZnO revealed dramatic change with plasma exposure: whereas the pre-plasma surface exhibited Ohmic behavior, the contact on the plasma-treated ZnO yielded a ~ 0.4 eV Schottky barrier with ~2 ideality factor. O plasma also significantly reduced 2.5 eV (i.e., green) NDREEL emission due to deep level (DL) traps by ~40% relative to the near band edge (NBE) emission both on and off the (semitransparent) Au contacts. In pre-plasma ZnO, the DL/NBE ratio was 40% higher at the free surface relative to that at ~ 90 nm deep. O plasma eliminated this near-surface increase. Further reduction occurred under the Au within < 20 nm of the interface. Our results are consistent with decrease in defect-assisted tunneling with plasma treatment vs. changes in Fermi level pinning.
9:00 AM	Invited	EM-TuM-3 Investigation of the Sources of Variations in the Electrical Characteristics of Ohmic and Rectifying Contacts L.M. Porter, F.A. Mohammad, D.J. Ewing (Carnegie Mellon University); R.R. Ciechonski, M. Syväjärvi, R. Yakimova (Linköping University, Sweden) Ohmic and rectifying contacts are widely known to yield significant variations in electrical properties, such as the contact resistance or Schottky barrier height. Importantly, these variations exist among contacts on the same substrate and therefore among contacts processed identically. In this study we have investigated more than one hundred ohmic and rectifying contacts on the wide band gap semiconductor, silicon carbide. The statistical variations in contact resistance, Schottky barrier height, etc. were quantitatively compared. As described below, the data indicate that multi-phase contacts and/or intrinsic or growth-related defects provide important sources of variability. We further show that control over these phenomena result in substantial improvements in the contact behavior. Ohmic contacts on p-type (1 x 10¹⁹ cm^-3) 4H-SiC were fabricated using both Pt and Pt-Si contacts and the conventional Al-Ti metallization. The Pt-Si contact layers were selected and processed such that single-phase PtSi contacts were produced, whereas the annealed Pt and Al-Ti contacts produced several phases. The single-phase PtSi contacts consistently yielded low contact resistances (4.9 x 10^-5 ohm-cm²) with a narrow distribution (standard deviation = 1.28 x 10^-5). Although the Al-Ti contacts yield comparable average contact resistance, the distributions in values for the multi-phase contacts were substantially higher. Nickel Schottky contacts were also investigated and showed a range of behaviors. For example, the barrier heights ranged from 0.88 - 1.36 eV and displayed an inverse correlation with the measured deep-level defect concentrations. The preliminary data also indicates that deep-level concentrations above ~5 x 10¹³ cm^-3 result in multiple-barrier characteristics in the forward I-V data.
9:40 AM		EM-TuM-5 Simultaneous Formation of p- and n-type Ohmic Contacts to 4H-SiC using Ni/Ti/Al Contact Materials S. Tsukimoto, T. Sakai, M. Murakami (Kyoto University, Japan) Both p- and n-type ohmic contacts are required for the future SiC power devices. Conventionally, these ohmic contacts are prepared using different materials and fabrication processes, because the current transport mechanisms for p- and n-type conductions are completely different. We succeeded to form simultaneously both p- and n-type ohmic contacts for 4H-SiC wide gap semiconductors using Ni/Ti/Al contact materials. The Ni/Ti/Al ohmic contacts were prepared by depositing sequentially Ni(20 nm), Ti(50 nm), and Al(50 nm) layers onto the p- and n-type SiC substrates which were doped with Al at 4.5x10¹⁸cm^-3 and with N at 1.4x10¹⁹cm^-3, respectively, and subsequently annealing at temperatures ranging form 600 °C to 1000 °C in an ultra high vacuum. The Ni/Ti/Al contacts showed ohmic behavior for both the p- and n-type SiC substrates after annealing at 800 °C. The specific contact resistances of these contacts for p- and n-type SiC were measured to be about 2x10^-3 Ω-cm² and 3x10^-4 Ω-cm², respectively. Based on interfacial microstructure analyzed by XRD measurements and cross-sectional TEM/HRTEM observations, the formation mechanism of the p/n-type Ni/Ti/Al ohmic contacts will be discussed.
10:00 AM		EM-TuM-6 Fabrication, Processing and Specific Contact Resistance Measurements of Contacts to Semiconductor Nanowires S. Dey, Y. Wang, K.-K. Lew, T.S. Mayer, J.M. Redwing, S.E. Mohney (The Pennsylvania State University) Ohmic contacts to semiconductor nanowires will be an essential component of many novel nanoscale electronic devices. In this presentation, we discuss the selection of metallizations and annealing conditions to lower the resistance of ohmic contacts to silicon nanowires, and we describe a method for measuring the specific contact resistance (or contact resistivity) of these contacts. To compare contact metallizations and processing conditions, silicon nanowires have been aligned using field-assisted assembly, and contacts have been fabricated using aluminum, palladium and titanium/gold metallizations. Aluminum and palladium contacts to p-type silicon nanowires have shown a reduction in contact resistance upon annealing. To then extract the specific contact resistance (or contact resistivity), equations have been developed that treat the metal/semiconductor nanowire contact as a transmission line, leading to the development of equations analogous to those used for describing contacts to semiconductor thin films using the transmission line model (TLM). The modified or nanowire TLM equations can be applied to several different metal/semiconductor nanowire test structures, and the advantages and disadvantages of the various geometries for testing the contacts are discussed. Finally, we provide the results of measurements in which we apply the nanowire TLM equations to a convenient test structure.
10:20 AM	Invited	EM-TuM-7 CMOS Metal Gate Implementation C. Cabral, Jr., V. Narayanan, J. Kedzierski, M. Copel, C. Lavoie, J.L. Jordan-Sweet, E.P. Gusev (IBM T.J. Watson Research Center); J.M.E. Harper (University of New Hampshire) As scaling of CMOS transistors continues, for improved performance and manufacturing density, the leakage current through the thinner oxynitride dielectrics is becoming prohibitively large. Replacing the polycrystalline silicon in the gate with a metal is an approach, which leads to a decrease in the electrical thickness of the gate without having to decrease the physical dielectric thickness. The elimination of the poly-Si depletion region thus improves performance without substantially degrading leakage current. There are several integration schemes for implementing metal gates. There is a conventional approach for which the metal-dielectric combination must withstand high temperature dopant activation anneals, a gate last approach which limits the temperature to that used for the interconnect levels and a process by which the poly-Si of the gate is consumed in a reaction to form a metal silicide. Replacing the poly-Si in the gate typically requires a dual metal approach; a metal with a pFET workfunction and a second with an nFET workfunction. In this work a variety of metallic materials with workfunctions spanning the Si bandgap are characterized to determine the most appropriate integration approach for each based on the thermal stability of the metal-dielectric. In situ x-ray diffraction, optical scattering and resistance analysis, conducted at the Brookhaven National Laboratory, were used to determine when a metal-dielectric combination undergoes thermal degradation during annealing. It was found that some materials undergo reactions with the dielectric, others were unstable due to agglomeration, several binary compounds undergo dissociation and materials such as W, Re, Rh, Ir, TaN and TaSiN are very stable. The fully silicided metal gate integration approach will also be discussed. It will be demonstrated that the workfunction for NiSi can be modulated by the addition of implanted species into the poly-Si gate before silicide formation or by alloying the Ni.
11:00 AM		EM-TuM-9 Physical and Electrical Properties of Mo_X N_Y and Mo_X Si_Y N_Z as Gate Electrode Materials for MOS Devices. R.M. Wallace, P. Zhao, P. Sivasubramani, I.S. Jeon (University of Texas at Dallas); J. Lee, J.Y. Kim (Kookmin University, Korea); M. Kim, B.E. Gnade (University of Texas at Dallas) Continued CMOS scaling requires high-k dielectrics and advanced metal gate electrodes in the gate stack. The work function of Mo has been reported to be controlled with N⁺ implantation.¹. The use of amorphous ternary M-Si-N (M=Ta, Mo, W) as a diffusion barrier for Al or Cu metallization has been previously studied,^{2 and 3} and TaSi_X N_Y as a metal gate electrode candidate has been recently reported.⁴. In this study, the work function and thermal stability of Mo(N) and MoSi(N) deposited by reactive sputtering with different N₂/Ar ratios and with different nitrogen implantation doses were investigated. The defects and trapped charges in the interface were also analyzed using CV and IV measurements at different temperatures. XPS, XRD, RBS, TEM, CV and IV results will be presented. Our results indicate that Mo(N) and MoSi(N) are potential CMOS gate candidates. This work is supported by the Texas Advanced Technology Program.} $Footnotes {¹ Rushkar Ranade, Hideki Takeuchi, Tsu-jae King and Chenming Hu, Electrochemical and Solid-State letters, 4 (11) G85-G87 (2001). ² J. S. Reid, E. Kolawa, R. P. Ruiz and M.-A. Nicolet, Thin Solid Film, 236, 319 (1993). ³ J. S. Reid, E. Kolawa, R. P. Ruiz and M.-A. Nicolet, F. Cardone, D. Gupta and R. P. Ruiz, Journal of Applied physics, 79, 1109 (1996). ⁴ You-Seok Suh, Greg P. Heuss, Jae-Hoon Lee, and Veena Misra, IEEE Electron Device Letters, 24, 439 (2003).
11:20 AM		EM-TuM-10 Influence of Interactions Between Ta-N Films and Low Dielectric Constant Materials on the Stability of Copper Interconnection C.-C. Chang (National Cheng Kung University, Taiwan); S.-K. JangJian (Taiwan Semiconductor Manufacturing Company, Taiwan); J.-S. Chen (National Cheng Kung University, Taiwan) Low dielectric constant (low-k) materials integration with copper metallization has been adopted widely in integrated circuits. In this work, properties of copper layers in the Cu/Ta-N/Ta/low-k materials/ structures were explored, where Ta-N layers are as-deposited amorphous TaN_x (x~0.5) or polycrystalline TaN films and low-k materials include fluorinated silicate glass (FSG) and organosilicate glass (OSG), respectively. The samples in the Cu/Ta-N/Ta/low-k materials structures were annealed in vacuum at 400°C for 30 minutes or an hour. Thermal interactions between Cu and Ta-N films or Ta-N layers and low-k materials were investigated by using sheet resistance measurement, X-ray diffraction, scanning electron microscopy, X-ray photoelectron spectrometry, and transmission electron microscopy. As the thickness of Ta-N films decreases from 50 nm to 10 nm, the preferred orientation of (111)_Cu will be improved significantly in the Cu/TaN_x systems after annealing. On the other hand, as the thickness of the Ta-N films decreases to 5 nm, surface morphologies of these as-deposited and annealed copper layers are different obviously from the others with thicker Ta-N barriers. It is attributed to the interfacial reactions between the Ta-N layers and low-k materials and the properties of the ultra-thin Ta-N films itself. All of these effects would be discussed in this study.
11:40 AM		EM-TuM-11 Low Resistivity Germanides S. Gaudet (Ecole Polytechnique de Montreal, Canada); C. Lavoie (IBM T.J. Watson Research Center); C. Detavernier (University of Ghent, Belgium); P. Desjardins (Ecole Polytechnique de Montreal, Canada) In microelectronics, because of the availability of high dielectric constant material for gate oxide, CMOS devices can now be built on pure Ge substrates in order to take advantage of the higher carrier mobility of this semiconductor. While literature is readily available on possible contacts to SiGe devices, contacts to pure Ge are much less documented. We performed a systematic study of the reaction of metals with Ge substrates to identify appropriate contact materials. Thin films of 20 different metals (Ti, Zr, Hf, V, Nb, Ta, Cr, Mo, W, Mn, Re, Fe, Ru, Co, Rh, Ir, Ni, Pd, Pt, Cu) were deposited on amorphous Ge, Poly-Ge and Ge (100). Metal-Ge reactions were measured in situ during annealing using time resolved XRD, light scattering and resistance measurements. Among possible candidates for direct contact to Ge, two interesting monogermanides, NiGe and PdGe, form at low temperature and exhibit low resistance for a wide range of temperatures.