AVS 70 Session TF+EM-ThA: Thin Films for Microelectronics II: Ferroelectrics, Dielectrics, and Semiconductors

Over the past few decades, atomic layer deposition (ALD) has become a key technique for the fabrication of multicomponent films in Si devices, such as 3D memory and logic devices. Conventionally, the formation of multilayers by supercycle method consisting of two or more ALD processes has been used, and the compositional ratio of the films could be controlled by cyclic ratio of two ALD processes. However, the supercycle method could not be applied to a few nanometers range in film thickness due to inconsistent surface reactions and low out-of-plane uniformity. Based on understanding of surface reactions mechanism in ALD, we have studied the concept of atomic layer modulation (ALM) for fabrication of the multicomponent thin film with atomic-scale control. The main key idea of ALM is that the compositional ratio is determined by the physical steric hindrance and the chemical reactivity of two precursors on the surface which can be predicted by theoretical calculations. We fabricated a HfZrO_x multicomponent thin film with controllable dopant ratio using a Hf precursor, tetrakis(dimethylamido)-hafnium (TDMAH), and a Zr precursor, tetrakis(ethylmethylamido)-zirconium (TEMAZ). Due to the differences of steric hindrance and chemical reactivities, the stoichiometry of HfZrO_x thin films is determined by the exposure sequence of precursors. Theoretical calculations were performed using Monte Carlo (MC) and density functional theory (DFT) to study physical and chemical reaction mechanisms. The theoretical results are consistent with the experiments analyzed by X-ray photoelectron spectroscopy (XPS) and transmission electron microscopy (TEM). From the ferroelectric property analysis, the ALM HfZrO_x films showed superior properties than the others prepared by conventional supercycle method, such as higher 2Pr values of 39.4 µC/cm², which is 2 times higher than in supercycle ALD HfZrO_x film. By enabling precise stoichiometric control at atomic level, the ALM method not only extends the potential for fabricating multicomponent oxide materials but also enhances the quality of the deposited films.

This presentation investigates the electrical characteristics of ferroelectric material Hf_0.5Zr_0.5O₂ (HZO) when deposited on Si using either thermal ALD or plasma ALD methods. Previous research has explored the differences in ALD deposition methods in metal-insulator-metal (MIM) capacitor structures with HZO deposited on metal. However, considering emerging non-volatile memory (eNVM) applications, a comparative evaluation based on Si substrates is necessary but has not yet been reported. We examined how the characteristics differ between thermal and plasma ALD deposition methods in metal-oxide-semiconductor (MOS) structures compared to MIM structures. Experiments were conducted by fabricating ferroelectric field-effect transistors (FEFETs) using thermal and plasma ALD deposition methods, followed by electrical characterization. The results showed that devices fabricated using plasma ALD exhibited similar results to MIM structures in MOS structures, including no wake-up effect, better endurance (one order higher), and a larger coercive voltage (V_c). Additionally, HR-TEM cross-sectional analysis revealed that plasma ALD requires a larger write voltage to achieve a given memory window due to the presence of a thicker SiO₂ interfacial layer. Through this study, it was observed that ferroelectric HZO devices fabricated using thermal ALD require wake-up and have one order lower endurance but offer the advantage of lower write voltage. On the other hand, devices fabricated using plasma ALD exhibit no wake-up effect, better endurance (one order higher), but have higher write voltage. Considering these characteristics, future device designs may benefit from taking into account the differences in characteristics based on ALD methods.

Recently, amorphous-oxide-semiconductor (AOS) materials, such as InGaZnO (IGZO), InZnO, and InWO, have been widely studied as channel materials for ferroelectric field-effect transistors (FeFETs) with a Hf_0.5Zr_0.5O₂ (HZO) gate dielectric because of their superior interface properties compared to Si channel-based FeFETs [1]. Typically, the fabrication of bottom-gate FeFETs with an AOS channel requires post-deposition annealing (PDA) after channel formation, which induces the formation of the ferroelectric orthorhombic phase in the HZO film and activates the AOS channel layer [2]. Meanwhile, it was reported that hydrogen atoms incorporated within the high-k film during atomic layer deposition (ALD) diffuse towards the IGZO channel region under thermal annealing, resulting in a notable change in the transfer characteristics of AOS-based FETs [3]. However, there is still a lack of research observing the detailed changes in the chemical and electrical properties of AOS-based FeFETs as a function of the PDA temperature.

In this presentation, we study the effect of PDA temperature on the electrical properties of bottom-gate HZO/IGZO FeFETs, where the PDA temperature was varied from 300 ℃ to 600 ℃ using rapid thermal annealing. The HZO and IGZO films were deposited in series via ALD with a Hf:Zr cycle ratio of 1:1 and sputtering of an IGZO target (In:Ga:Zn=1:1:1), respectively. Microstructural analysis revealed that, despite a significant volume shrinkage, the IGZO film maintained its amorphous structure after PDA at 600 °C, while the ferroelectric phase emerged in the HZO films after PDA at 400−600 ℃. Distinct changes in hydrogen content within the IGZO/HZO stack were observed at different PDA temperatures. These changes in hydrogen content, along with the evolution of the ferroelectric phase, significantly influenced the transfer characteristics of the fabricated devices, including parameters such as the threshold voltage and hysteresis loop direction.

References

[1] J. Ajayan et al., Mater. Today Commun. 35, 105591 (2023)

[2] F. Mo et al., IEEE J. Electron Devices Soc. 8, 717 (2020)

[3] Y. Nam et al., RSC Adv. 8, 5622 (2018)

Metal-ferroelectric-metal heterostructures have diverse applications ranging from ferroelectric non-volatile memories and sensing to neuromorphic computing. Traditionally, lead-based perovskite oxide ferroelectrics such as PZT and PMN-PT have been leading contenders in some of these applications. However, the toxicity of lead has prompted a renewed interest in the latent potential of lead-free ferroelectrics such as BaTiO₃ within the perovskite oxide family.

A long-standing challenge to unlock the potential of BaTiO₃ is systematically isolating the effect of parameters such as epitaxial strain, stoichiometry, and dimensionality on the ferroelectric properties of BaTiO₃ films. Producing reliable thin-film metal-ferroelectric-metal heterostructures for these studies depends on the (1) degree of control in the synthesis of each layer and (2) the atomic sharpness of the metal-ferroelectric interfaces. Despite molecular beam epitaxy (MBE) being the preferred growth method for heterostructures due to the high quality of the constituent layers and abrupt interfaces, the growth of ferroelectric BaTiO₃ with SrRuO₃ as metallic electrodes has two key challenges. First, elemental Ru is simultaneously difficult to evaporate and oxidize, requiring the use of electron-beam evaporators and potent oxidants which complicate stoichiometry control. Second, balancing the retention of molecular flow and preserving ideal oxygen stoichiometry and, consequently, ferroelectricity restricts the oxygen background pressures to ~1-3 orders of magnitude lower than in other synthesis methods.

We present the growth of SrRuO₃ and BaTiO₃­ films using metal-organic MBE, overcoming both challenges. Using a solid metal-organic precursor for Ru, we show the presence of an adsorption-controlled growth window within which the films self-regulate their cation stoichiometry for SrRuO₃ films on SrTiO₃ (001) substrates. We grow phase-pure, epitaxial, single-crystalline BaTiO₃ on SrRuO₃-buffered SrTiO₃ (001) substrates and note polarization switching with piezoresponse force microscopy for an applied bias of ± 6 V for a ~36 nm BaTiO₃ film without any post-growth oxygen annealing. We extend this technique to grow SrRuO₃/BaTiO₃/SrRuO₃ heterostructures on Nb-doped SrTiO₃ (001) substrates. For a ~40 nm BaTiO₃ layer, we observe a room-temperature static dielectric constant of ~400 and ideal capacitor-like behavior up to 1 kHz using impedance spectroscopy. We demonstrate hysteretic P-E curves with P_r ~ 17 µC cm^-2 and an E_c ~ 221 kV cm^-1 at f = 1 kHz. We will discuss the effect of stoichiometry, strain, and dimensionality on the structural and dielectric properties of metal-organic MBE-grown BaTiO₃.

Wide-bandgap transistor development for next generation power electronics is promising. This is due to their higher breakdown field and saturated electron velocity over traditional silicon insulated-gate bipolar-transistors, and within this development, a push towards wider bandgaps in the Al_xGa_1-xN system by increasing the Al-content is desired to further improve breakdown strengths and power densities in devices.However, even with higher breakdown strength, electric field spikes between the gate-drain on high-electron-mobility-transistors can result in device failure far below the inherent breakdown strength of the semiconductor.This has led to the integration of high-permittivity dielectrics on top of the semiconductor to mitigate these spikes; BaTiO₃ has received much of the attention owing to its large dielectric constant.Here we will report on the integration of RF sputtered BaTiO₃ thin films onto Al_0.85Ga_0.15N substrates with a focus on the film morphology under specific deposition conditions.Results will focus on film morphology (x-ray diffraction, scanning electron microscopy, and atomic force microscopy) and stoichiometry (electron microprobe and x-ray fluorescence).

Sandia National Laboratories is a multi-mission laboratory managed and operated by National Technology & Engineering Solutions of Sandia, LLC (NTESS), a wholly owned subsidiary of Honeywell International Inc., for the U.S. Department of Energy’s National Nuclear Security Administration (DOE/NNSA) under contract DE-NA0003525.

This talk will discuss our work to develop a robust atomic layer deposition process (ALD) to create ferroelectric BaTiO₃ thin films.Ferroelectric materials are the potential candidates for future low voltage RAM and NAND memory because of their reversible two polarization states under low external electric field. While the CMOS compatible gate dielectric materials HfO₂ and Hf_0.5Zr_0.5O₂ are ferroelectric, they have high coercive fields which makes it difficult to lower switching voltages to below 1V. Therefore, perovskite ferroelectric materials, like BaTiO₃ are desirable to use for these applications because their coercive voltages can be an order of magnitude lower, approaching 0.1 V.However, such a ferroelectric needs to be deposited by ALD to match the conformality and small thickness requirements desired for RAM and NAND memory and unfortunately, the deposition of multicomponent, stoichiometric crystalline phases by ALD is extremely challenging.In this talk we will discuss our efforts to achieve ALD of BaTiO₃ and discuss its microstructure, chemistry, and electrical properties.Specifically we will discuss variations caused by the use of different titanium precursors and their potential to lead to reduced oxidation states, hydrated phases, or carbon contamination that can prevent crystallization.We will also discuss the influence of these chemistries on stoichiometry and the ability to get pure crystalline phases.

Integration of low dielectric constant thin films in transistors and memories is a crucial step in realization of high speed, low-power and high-performance switches with lower parasite capacitance. Dielectric films, such as SiO₂ and Si₃N₄ and amorphous films deposited via Atomic Layer Deposition (ALD), were studied extensively providing a wide range of dielectric constants from 4.0 to 7.0. However, next generation of low-K spacer films targeting low-power high-performance applications requires conformal films on patterned structures with dielectric constant below silicon oxide (< 4.0) with good leakage current as low as <10^-7 A.cm² at 1 MV/cm. Moreover, these thin films are expected to show high stability and high resistance to etching after exposure to HF which are typical integration steps in semiconductor device processing. Boron nitride is a new materials system in which lower dielectric constant than SiO₂ and Si₃N₄ is expected.­ Previous study demonstrated PECVD boron nitride films with k as low as 2.0. Deposition of amorphous BN via ALD seems to be a superb candidate for the next generation of low-K spacer materials with dielectric constant below 3.0.

In this work, BN deposition was studied by use of BCl₃ and NH₃ as Boron and Nitrogen sources. NH₃ reacted with BCl₃ via surface-controlled reactions both thermally at 300°C, 400°C and 500°C and through NH₃ plasma generation at 200W and 300°C. ALD-deposited BN films showed uniformity of below 5% and thickness of 200Å measured by ellipsometer. Furthermore, electrical performance of BN films was measured by Capacitance-Voltage and Current-Voltage in Metal-Insulator-Semiconductor (MIS) structure using Mercury probe. To understand the incorporation of B and N and other elements such as C, O and Cl, crystallinity degree of the films and B-N bonding structures, X-ray Photoelectron Spectroscopy (XPS) and Fourier Transform Infrared Spectroscopy (FTIR) were utilized. Finally, the stability and resistance of ALD BN films to HF exposure was measured and monitored with time.

It was shown that amorphization degree increases at lower temperature and use of NH₃ plasma. However, thermally deposited BN at lower temperature showed high oxygen incorporation leading to degraded properties such as instability, low resistance to etching and poor electrical performances. Plasma ALD BN showed the lowest dielectric constant at 3.4 and wet etch rate below 0.03 time of the thermal oxide. Nevertheless, all BN films deposited with BCl₃ and NH₃ resulted in B/N~1.3 indicative of poor network formation. This led to formation of instable films with rough surfaces and degradation of bulk properties overtime.

Since its introduction as a channel-strain inducer in the early 2000s [1], in-situ epitaxial Si_1-xGe_x films doped with boron (B) have been continuously employed as source and drain (S/D) regions in high-performance p-channel transistors, including the most advanced devices with a gate-all-around structure [2]. However, when the B doping concentration exceeds 10²¹ atoms/cm³ in the Si_1-xGe_x film, the B atoms may partially occupy interstitial sites or form clusters, producing defects that can reduce the electrical activation ratio [3]. Therefore, it is crucial to assess these defects through electrical characterization because they can significantly impact the final device performance [4]. Furthermore, while the effect of defects on the electrical properties of Si_1-xGe_x/Si p⁺−n diode has been studied in the context of their application to S/D regions [5], there remains a need for a more extensive study, including further investigation of their effect on the contact properties of Si_1-xGe_x to the overlaid metals.

This presentation discusses various electrical properties of in-situ B-doped Si_1-xGe_x films epitaxially grown on n-type Si substrates, where crystalline defects are intentionally induced by varying the thickness and doping concentration. Various electrical parameters, such as reverse leakage current, on/off ratio, ideality factor, and activation energy, were extracted from the current−voltage characteristics of the p⁺−n diodes. These parameters’ changes were correlated with the presence of defects in the Si_1-xGe_x film. In addition, the contact resistivity values measured by a circular transmission line method also exhibited a similar trend, demonstrating reliable results regarding the effect of these defects.

[1] S. Thompson et al., 2002 IEEE International Electron Devices Meeting (IEDM) 61−64

[2] S. Barraud et al., 2016 IEEE International Electron Devices Meeting (IEDM) 17.6.1−17.6.4

[3] A. Moriya et al., Thin Solid Films 343-344, 541−544 (1999)

[4] T. Bhat et al., IEEE Trans. Semicond. Manuf. 33, 291 (2020)

[5] H. Huang et al., J. Appl. Phys. 89, 5133−5137 (2001)