AVS2015 Session EM-TuP: Electronic Materials and Processing Poster Session

Electrochromic materials are able to change the optical properties persistently and reversibly by an external voltage. Applications of electrochromic materials include rearview mirrors, smart windows, display panels, etc. A large number of transition metal oxides such as the well-known tungsten trioxide (WO₃) cathodic material, which reversibly switches from transparent to blue upon lithium or proton insertion.

In contrast, nickel oxide (NiO) is an anodically coloring material but despite promising features such as high coloration efficiency, good optical memory and cost effectiveness. NiO is often used as a secondary electrochromic material to complement cathodically coloring WO₃ in prototype electrochromic devises. Because NiO have for a long time attracted attention as counter electrode regarding their brownish color in the oxidized state that, together with the blue color of the reduced WO₃, yields a neutral gray color device in the colored state. The electrochromism in NiO films is rather complicated although it is generally accepted that the reversible transition between colored and bleached states is related to redox process between the NiOOH and NiO. Moreover, owing to their rapid degradation on cycling, difficulties in using nickel oxide films have been encountered. However, the problems of NiO thin films that limit their commercialization and poor durability are still debated. When NiO film is formed as porous structure, the surface area to the volume ratio is large and the same probably lead to an increase in the ion intercalation and deintercalation. The large-area surface of the porous film structure can be helpful for the augmenting the optical modulation.

In our study, the porous NiO thin film was deposited using sol gel-method and dip-coating technique on the Indium Tin Oxide (ITO) glass. The NiO thin film was formed by annealing process at different temperatures after the dip-coating technique. Studies on the effect of annealing temperature to improve the crystallinity and the electrochromic properties of the NiO thin films have been carried out. So, we confirmed that the electrochromic efficiency was improved by optimizing of the annealing condition.

Recently, the antenna has been scaled down to nanometer to absorb higher electric-magnetic wave. Traditionally in communication area, high frequency is required to transmit or receive much more information. Nanometer antenna is different from general antenna in communication area due to properties and applications. Nanoantenna can cover the visible to near-infrared (NIR) wavelength regions; thus, it has a lots of applications in communication, optics, bioelectronics and so forth. Especially in optics area, not only the light control but also structure-depended absorption, reflection, and transmission using nanoantenna have been studied. The light absorption using nanoantenna can be useful to harvest electrical energy instead of solar cells expected to be much higher efficiency as well. The optical properties of nanoantenna can be affected by geometry factors such as structure, shape, and pitch. It cannot correspond traditional antenna theory due to surface plasmons (SPs) which are coherent delocalized electron. This penomenons exist at the interface between two materials, strong couplings between electrons on metal and incident light. Designing nanoantenna is much more complicate than that of general antenna so that it does not simply follow conventional antenna theory. To apply the nanoantenna to various applications, the study of parameters to define optical properties in nanoantenna should be necessary. We focused on control of color via nanoantenna depending on various geometries. First of all, we investigated the relation between parameters and color change. We can design the target peak wavelength in visible region. Then, we will report optical transistor to control colors. It can be applied to various applications such as color filter, next-generation display, energy harvesting system with higher efficiency, and so on.

The early assumptions have been that thin-film development and contact area the two major issues in defining characteristics of the MIM tunnel diode. Based on this the focus has rigorously been on patterning and various thin-film deposition techniques for MIM formation. Several designs with varied fabrication methods have been considered for fabrication of MIM devices till date for applications like energy-harvesting devices, terahertz electronics, macro electronics, etc. Here we elaborate upon each design and associated fabrication challenges for Ni-NiO based MIM and MIIM diodes. The goal is to optimize the MIM device design for: (1) ease of integration with other circuit devices, and (2) simpler fabrication steps for minimizing alteration in oxide property and inherent device impedance. Fabrication issues such as material selection, metal deposition, oxide growth/deposition, and patterning are discussed. Since ALD is currently the leading way to provide uniform, pinhole free and ultra-thin oxide layers, we present a comparison of oxide properties deposited by sputtering and ALD (the leading techniques) along with their impact on I-V characteristics. Influence of surface preparation on oxide and growth/deposition temperature are also discussed.

Investigation of magnetic tunnel junction (MTJ) is a key issue for the development of advanced magnetoresistive random access memories (MRAMs). MTJs consist of two metal ferromagnets, thick magnetization-fixed and thin magnetization-free layers, separated by a thin insulator, and they exhibit two resistances, low or high, depending on the relative direction of the magnetizations of fixed and free layers, parallel (P) or antiparallel (AP) configuration. The simplest way to reverse the magnetization of free layer is switching by external magnetic fields. However, absolute currents required for the magnetic-field switching do not scale with reducing the junction size. At present, current-induced magnetization switching (CIMS) proposed by Slonczewski [1] and Berger [2] is drawing attention as the most promising candidate for a mechanism of magnetization reversal of free layer, owing to the scalability of CIMS [3]. Although CIMS has been successfully applied to the operation of MRAM, it has not been sufficiently understood yet.

In this work, we investigated electron scattering processes in CIMS of a MTJ by the non-equilibrium Green's function technique coupled with the density-functional theory [4]. We employed a Fe/MgO/Fe MTJ sandwiched between ferromagnetic Fe and paramagnetic Ta electrodes, as a typical MTJ model. The current-voltage characteristics indicated high tunnel magnetoresistance of the MTJ (about 600% at zero bias) and was highly antisymmetric with respect to the bias voltage, originating from the antisymmetric structure and the magnetization configuration. We found from the current density dependence of magnetization of the free layer that the switching from AP to P configuration could be realized by lower electrical power than P-to-AP case. From detailed analyses of the density of states subject to a finite bias voltage, we clarified that the asymmetric behavior originates from the difference in the electron scattering processes between switching directions.

[1] J. C. Slonczewski, J. Magn. Magn. Mater. 159, L1 (1996).

[2] L. Berger, Phys. Rev. B 54, 9353 (1996).

[3] Ikeda et al., IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 54, 991 (2007).

Superlattice phase change memory (superlattice PCM) consisting of (GeTe)₂/Sb₂Te₃ stacked structure is one of the most promising candidates for next-generation non-volatile memories and has received considerable attention in recent years [1,2]. The memory operations are attributed to small structural change between two atomic configurations before and after switching. Therefore, the energy required for switching between higher and lower resistive states is much lower than that of conventional PCMs utilizing phase transition between crystal and amorphous phases [3]. However, the reaction pathway in switching of superlattice PCM has not yet been clarified and the detailed analyses of the structural transition between high-resistive and low-resistive states are prerequisites for fully understanding the switching mechanism.

In this work, we investigated the switching process of the superlattice (GeTe)₂/Sb₂Te₃ PCM using the first-principles electronic states calculations. The atomic structures and the electronic states were calculated by VASP code [4], which is based on density functional theory with the plane-wave basis sets, a PBE-type exchange-correlation functional and the projector augmented-wave method. For the calculations, k points of 8 x 8 x 4 Monkhorst-Pack grid were used and the cutoff energy was 500eV.

We found that atomic configurations of high-resistive and low-resistive states are not stable but metastable [5]. Therefore, the superlattice (GeTe)₂/Sb₂Te₃ PCM can do cyclic operations due to the metastability. In addition, we clarified the structural transition process between high-resistive and low-resistive states. I will show the detail process in the announcement. Furthermore, the validity of our proposal will be shown from the detailed analyses of the potential energy surface and electron-density distribution.

[1] J. Tominaga, et al., Jpn. J. Appl. Phys. 48, 03A053 (2009).

[2] N. Takaura, et al., IEDM Tech. Dig., p.685 (2014).

[3] R. E. Simpson, et al., Nat. Nanotech. 6, 501 (2011).

[4] G. Kresse and J. Hafner, Phys. Rev. B 47, 558 (1993).

[5] R. Ohyanagi, et al., Appl. Phys. Lett. 104, 252106 (2014).

Metal-Oxide-Nitride-Oxide-Semiconductor (MONOS) memories have attracted a great attention as one of the next generation NAND flash memories. MONOS memories can trap charges inside defect sites in charge trap layers (SiN) that are spatially separated each other, leading to great merits for integration techniques such as 3D-structure and multi-level-cell operation. On the charge trapping layer in MONOS memories, it has been reported that large amounts of O and N atoms are incorporated into SiO₂/SiN interfaces, leading to the formation of electron occupied defects near the interfaces [1]. In addition, Vianello et al. have found that a lot of H atoms distribute in SiO₂, SiN and interface [2]. Yamaguchi et al. have also reported atomic-scale behavior of such defects in MONOS SiN layers during program/erase (P/E) cycles [3]. However, for SiO₂ layer of MONOS memories, the decisive atomic-scale information has not been clarified yet.

In this work, we investigate the behavior of N, H atom and O vacancy in SiO₂ during P/E cycles using VASP code [4], which is based on the density functional theory with GGA of Perdew-Wang-91. Core valence interactions were described by the ultrasoft pseudo potential. To simulate N related defects in SiO₂ layer near SiN/SiO₂ interface, we employed the 72 atoms super-cell of α-quartz including the defects. The defects formed by substituting two N atoms for two O atoms in SiO₂. The P/E operations correspond to the electron and hole injections into the defects in our calculation.

We found that O vacancies are induced by the two N-substituted defects, forming the complex defect (VoN2) that consists of one O vacancy and two N atoms. Then, VoN2 defect cannot traps charges when the Fermi energy of MONOS is within the ranges of SiN band gap. We also found that the diffusing H atoms in SiO₂ change the characteristics of VoN2 defect. VoN2 defect is transformed to another defect including H atoms (VoN2-H) by adsorbing hydrogen atoms. While VoN2-H defect is energetically unstable compared with VoN2 in the neutral charge state, VoN2-H defect becomes very stable in the negative charge state. This indicates that VoN2-H defect is able to trap electrons.

These results suggest that the amount of trapped charges on MONOS memories strongly depends on the dynamics of H atoms in SiO₂ during P/E cycles; namely, the thermal diffusion of H atoms would bring about the threshold voltage shift of MONOS memories.

[1] M. Miura, et al., IEICE Tech. Rep. SDM, pp.17, (2007).

[2] E. Vianello et at., IEDM Tech. Dig., pp.75, (2009).

[3] K. Yamaguchi, et al., IEDM Tech. Dig., p.122, (2010).

[4] G. Kresse and J. Hafner, Phys. Rev. B 47, 558 (1993).

An in-situ crystallization technique was used to prepare a hybrid containing Cu nanoparticles (NPs) bound to reduced graphene oxide (rGO) sheets. The hybrid material was investigated with scanning electron microscopy (SEM), Raman spectroscopy, ultraviolet visible spectroscopy (UV/vis), X-ray photoelectron spectroscopy (XPS), and Fourier transform infrared spectroscopy (FTIR). SEM results show that spherical Cu nanoparticles ranging from 1.6 to 7.4 nm in diameter and agglomerates were randomly dispersed on rGO sheets. SEM images show that Cu NPs were intercalated between rGO sheets to form a hybrid material. UV/vis of the rGO:Cu hybrid contained peaks associated with GO and Cu NPs with a blue shift in the peak resulting from n→pi^* transitions of C=O bonds to 283 nm and a red shift in the peak indicative of the Cu surface plasmon resonance to 585 to 630 nm. XPS confirmed the presence of CuO and Cu(OH)₂ with peaks at 933.4 and 934.5 eV respectively. The presence of imidazole, from the ionic liquid [Bmim][BF₄] used to synthesize the Cu NPs, was confirmed by the XPS peak found at 400.4 eV and the contributions to fingerprint regions in the FTIR. The as synthesized rGO:Cu hybrid had an electrical conductivity of 3.5*10⁶ S/m. This value is intermediate between GO with a baseline of 0.04 S/m and Cu NP thin film conductivity of 2.0*10⁷ S/m.

A key technology to fabricate highly efficient and reliable GaN-based light-emitting diodes (LEDs) is transparent conductive electrodes (TCEs), which are used as the Ohmic contact to p-GaN and the current spreader. Indeed, a lot of attempts have been made to fabricate better TCEs with high optical transmittance, low sheet resistance, and low contact resistance by employing Pt, oxidized Ni/Au, indium tin oxide (ITO), zinc oxide (ZnO), carbon nanotubes, graphene, et c. Among these TCEs, ITOs are the best in terms of their high optical transmittance in the visible wavelength range, low sheet resistances, feasible Ohmic contact to p-GaN, and guaranteed robustness, enabling them to be practically used in commercial products. Unfortunately, however, the sputtering process, which can produce the best quality of ITO films, cannot be used for the deposition of ITO film to p-GaN, associated with the sputtering damage of p-GaN surface. As an alternative, therefore, the e-beam evaporation technique, which is a representative physical vapor deposition technique free of ion damage, has been used for the ITO deposition. However, the evaporated ITO films were relatively poorer than the sputtered films due to the lack of stoichiometry and insufficient crystallinity of the ITO.

In this article, we investigated selective area growth of InN materials on sapphire substrate using molybdenum mask patterned with various growth temperature. The surface morphology, structural and optical properties of InN materials were analyses by field emission scanning electron microscopy (FE-SEM), transmission electron microscopy (TEM), X-ray diffractiometer and photoluminescence, respectively. XRD results indicated that the InN materials exhibited preferred orientation along the <0001> direction at 550 ^oC. Surface morphology shows that the InN crystals were grown on Mo-patterned substrate with hexagonal micro-rods array surface texturing. TEM images show these InN films are single phase wurtzite crystals with preferred orientation along the c axis. Optical properties showed the peaks of near band-edge emission at energies between 0.72 - 0.9 eV.

N+-InGaP and N+-GaAs layers were grown by Chemical Beam Epitaxy (CBE) on GaAs substrates with (001) orientation. Two group of samples with N+-InGaP (350 nm)/GaAs-buffer layer (300 nm)/GaAs S.I. (Semi-Insulating) and N+-GaAs (300 nm)/GaAs-buffer layer (300 nm)/GaAs S.I. were obtained. X-Ray diffraction (XRD) analysis was used in order to determine the InGaP lattice mismatch on GaAs. N+-InGaP lattice-matched layers on GaAs were obtained using a growing temperature of 550^oC during the process in CBE reactor, while, for N+-GaAs on GaAs samples, the temperature was 550^oC. By Hall measurements, a silicon doping of 10⁺¹⁸ cm^-3 was extracted for both group of samples, indicating the formation of N+-type layers. These samples are being used for MOS Junctionless (JL) Transistors applications, because III-V semiconductors present higher electron mobility values than silicon. These JL transistors (with three terminals: gate, source and drain) are being fabricated using Focused Ion Beam (FIB) System, based on similar process steps of the JL devices, which were fabricated on Silicon-on-Insulator (SOI) substrate_[1]. Thus, Gallium (Ga⁺) Focused Ion Beam (FIB) is used to define the III-V (InGaP or GaAs) nanowires (III-VNW), which are the electron conduction channel between source and drain, and for depositions of SiO₂ (as gate dielectric) and Pt (as gate, drain and source electrodes) layers_[2]. Finally, drain-source current (I_DS) versus drain-source voltage (V_DS) and drain-source current (I_DS) versus gate-source voltage (V_GS) measurements of Junctionless devices will be extracted and will be able to indicate if these InGaP or GaAs nanowires are suitable for Junctionless transistors applications.

References:

[1] Lima, L. P. B., et al. "Junctionless Fabrication on SOI Wafers Using Focused Ion Beam Milling and Al Diffusion."ECS Transactions 49.1 (2012): 367-374.

[2] dos Santos, Marcos V. Puydinger, et al. "Fabrication of p-type silicon nanowires for 3D FETs using focused ion beam."Journal of Vacuum Science & Technology B 31.6 (2013): 06FA01.

This work was supported by the Semiconductor Research Corporation under Contract 2012-KJ-2359 and by the National Science Foundation under Grant CBET-1066231.

This work was supported by the Semiconductor Research Corporation under Contract 2012-KJ-2359 and by the National Science Foundation under Grant CBET-1066231.

Bi₂Te₃ and Sb₂Te₃ are well-known materials for thermoelectric applications, which have also recently been identified as topological insulators (Tis) with surface states consisting of a single Dirac cone. Spin-momentum locking in Tis make them desirable for spintronics and other applications. However, to be useful for such devices, these materials must be bulk insulating and have accessible surface states, requiring both the Fermi level and the Dirac point to be located within the bulk bandgap. Furthermore, it is desirable to possess these properties at room temperature in ambient conditions. Robust surface states in ambient conditions have been demonstrated for Bi₂Se₃, [1] but to our knowledge direct detection of topological surface states has yet to be demonstrated in BiSbTe systems. Here we use scanning tunneling microscopy and spectroscopy to characterize the band structure of 30nm MBE-grown (Bi_.42Sb_.58)₂Te₃ thin films, revealing the presence of topological surface states within the bulk band gap. Both the Fermi level and the Dirac point are located inside the bulk bandgap, indicating bulk insulating behavior with accessible surface states. Furthermore, the surface states are robust to room temperature and limited air exposure.

Band alignment between materials and potential changes across thin films is of great importance for understanding electronic properties of multilayer structures and their resulting properties in devices. Although energy alignment and band bending has been studied for decades, an accurate profile of the potential across an ultrathin insulating layer (<10nm) has yet to be determined. In this work, we have developed a new approach to precisely measure the potential profile across Metal/Oxide/Semiconductor (MOS) stacks under in-situ gate-biasing conditions, using x-ray photoemission spectroscopy (XPS). Previous attempts of potential profile measurements have been limited to qualitative assertions due to the absence of controlled biasing. Here, interface dipoles and band bending at the oxide/semiconductor interface, as well as the effective potential across the oxide have been directly measured as a function of the bias applied between the semiconductor and the gate. This technique opens a large field of research, as it allows simultaneously a chemical mapping and a quantitative characterization of potential profiles in novel structures.