AVS2011 Session EM-ThP: Electronic Materials and Processing Poster Session

In this paper, we report to fabricate multilayered Bi₂Te₃/Sb₂Te₃ and Bi₂Te₃/Bi₂Te_3-xSe_xthin film cooling devices using the microfabrication techniques. The multilayered Bi₂Te₃/Sb₂Te₃ and Bi₂Te₃/Bi₂Te_3-xSe_xthin films will be grown using the e-beam evaporation. The in-plane and cross-plane micro cooling devices will be fabricated using the standard integrated circuit (IC) fabrication process; pn junction diodes will be fabricated as thermometers for the measurement of temperature in the devices. The electrical and thermal properties of the e-beam-grown Bi₂Te₃/Sb₂Te₃ and Bi₂Te₃/Bi₂Te_3-xSe_xthin films and the cooling efficiency of the fabricated cooling devices will be measured, and the measurement results will be reported in the conference. The developed devices could be a good candidate for the application of high-efficiency solid-state micro-cooling.

In recent years, the development of novel processes for inexpensive and flexible electronics has become an increasing research area where low-cost and low temperature deposition techniques are key point to fabricate large area and flexible circuits. Here, we demonstrate fully photolithography defined thin film transistors using cadmium sulfide (CdS) and lead sulfide (PbS) as n-type and p-type semiconductors, respectively. These chalcogenides materials are deposited using chemical bath deposition (CBD) which is a low cost solution-based process that requires temperatures below 70° C. Extracted mobility for CdS was 25 cm²/V-s and 0.14 cm²/V-s for PbS. These mobilities are among the highest reported for a fully patterned TFT made with either CdS or PbS as semiconductor. The maximum temperature used in the complete fabrication process was kept below 100° C. In addition, we studied how the device performance (mobility, threshold voltage and contact resistance) is affected depending on the semiconductor thickness, thermal annealing and the metal used as drain-source electrodes. Our fabrication approach can be integrated in complex designs such as CMOS logic gates, pixel arrays, etc., complying with all the requirements for a flexible electronics technology.

Tantalum nitride (TaN) films have been obtained by DC sputtering deposition in a nitrogen/argon ambient on Si substrates. TaN film have been used as gate electrodes in MOS capacitors and in Schoktty diodes on Si substrates. 20nm and 100nm thick TaN layers were deposited by DC sputtering in N₂:Ar (20:60 sccm) ambient, with a sputtering power of 1000 W. These films presented electrical resistivity of 327 Ω.cm and poly crystalline strucure. XPS analysis evidence TaN and Ta₂O₅ formation in both 20 nm (Fig. 1) and 100 nm (Fig. 2) thick films. Ta₂O₅ formation could be related with the exposure the metal electrode to air. To get MOS capacitors with TaN/SiO₂/Si/Al and Al/TaN/SiO₂/Si/Al structures, the Si substrates were used and were cleaned with a standard RCA method. After, dry thermal oxidation at 1000°C for 2 min was carried out and a 8 nm thick SiO₂ layer on Si was obtained. 20 nm and 100nm thick TaN layer was deposited on SiO₂/Si by DC sputtering. Finally, in some devices a 200nm thick alumininum (Al) layer was deposited on TaN layer by DC sputtering, in order to reduce these contamination of the metal electrode. MOS capacitor pattern was defined by a mask composed of an array of 200 µm diameter dots. These devices were sintered in conventional furnace in forming gas at 450 °C for 30 minutes and were electrical characterized by capacitance-voltage (C-V) measurements. Figure 3 and 4 presents MOS capacitor C-V characteristics. TaN work function values and flat-band voltage were extracted from all C-V measurements using CVC software and 1/C² method. The extracted TaN work function values and flat-band voltage were between 4.3 and 4.4 eV (Fig. 3-4), 0.1 and 0.2 V (Fig. 3-4), respectively. The variations on work function values are related with the dipole variations due the interface between metal and dielectric. To investigate the TaN work function, Schoktty diodes were fabricated in the same substrate of MOS capacitors. TaN layer were deposited by DC sputtering in a N₂:Ar (20:60 sccm) ambient, with a sputtering power of 1000 W. TaN/Si/Al and Al/TaN/Si/Al diodes were formed with TaN (20nm and 100nm) gate electrodes and Al layer (200nm) were deposited by DC sputtering process. These diodes were sintered in conventional furnace in forming gas at 450 °C for 30 minutes. The electrodes were patterned with a mask composed of an array of 200 µm diameter dots. These diodes were electrical characterized by current-voltage (I-V) measurements, and the ideality factor between 1.1 and 1.5, and work function values between 4.4 and 4.5 eV were extracted, which is near the work function values for mid-gap electrode application.

Titanium-Aluminum Oxide (TiAlO) and Titanium-Aluminum Oxynitride (TiAlON) high k films have received considerable attention due to their electrical and physical properties, which are from the composition of Titanium Oxide and Aluminum Oxide properties, such as higher permittivity (k~80) and higher band gap (Eg~8.8 eV), respectively, than others high k (such as HfO₂ and ZrO₂) films [1,2]. Furthermore, this composition can reduce the undesirable effects on sub-32 nm MOS devices, which are high leakage current, due to the value of band offset of 2.8 eV to Al₂O₃, and EOT higher than 2 nm, due to relatively low k between 8 and 10, respectively. In this work, Titanium-Aluminum Oxide (TiAlO) and Titanium-Aluminum Oxynitride (TiAlON) were obtained on Si wafers as follow: 0.75 nm Titanium (Ti) and 0.25 nm Aluminum (Al) were sequentially deposited by vacuum e-beam evaporation, without any substrate heating. The evaporation pressure was 3x10^-8 Torr, and the Ti and Al evaporation rates were of 0.1 nm/min, resulting in Al/Ti/Si structures. ECR (electron cyclotron resonance) plasma oxidation and oxynitridation process were carried out on these strucures using O₂/Ar and O₂/N₂/Ar gases, respectively, to get the TiAlO and TiAlON films on Si. Physical thickness values between 6.3 and 6.9 nm were determined by ellipsometry. XPS (X-Ray Photoelectron Spectroscopy) analysis was performed and the formation of TiAlO and TiAlON films was confirmed. These films were used as gate insulators in MOS capacitors fabricated with TiN (20nm)/Al (180 nm) electrodes, and they were used to obtain capacitance–voltage (C–V) measurements. A relative dielectric constant of 3.9 was adopted to extract the equivalent oxide thickness (EOT) of films from C–V curves under strong accumulation condition, resulting in values between 0.5 and 1.4 nm, and effective charge densities of about 10¹¹ cm^-2. Because of these results, nMOSFETs with TiN/Al gate electrode and TAON gate dielectric were fabricated and characterized by current–voltage (I–V) curves. These results indicate that the obtained TiAlON and TiAlO films are suitable gate insulator for the next generation (MOS) devices.

Reference:

[1] Miyoshi J., Diniz J.A., Barros A.D., Doi I., Von Zuben A.A.G., (2010) Microelectronic Engineering, 87 (3), pp. 267-270.

[2] A. P. Alekhin, A. A. Chouprik, S. A. Gudkova, and A. M. Markeev, Yu. Yu. Lebedinskii, Yu. A. Matveyev, and A. V. Zenkevich, 01A302-1 J. Vac. Sci. Technol. B 29(1), Jan/Feb 2011.

Indium nitride (InN) and indium-rich group III-nitride alloys may have great potential for high efficient energy conversion devices such as solar cells, high speed optoelectronic devices, and various types of light emitting device structures. Scientists are exploring several different growth methods and various characterization methods to improve the material quality and to understand the optical, structural, and electronic properties of these epilayers. However, till today, the growth of high quality InN alloys and epilayers is still a challenge, mainly due to low InN dissociation temperature and due to stoichiometry instabilities at optimum growth conditions. InN epilayers exhibit significant different physical properties depending on the growth techniques (PAMBE, MBE, MOCVD, etc.) and the substrate material used. At present, low-pressure CVD based growth methods are limited to InN growth temperatures at or below 600°C, which creates problems related to a suited nitrogen precursor, since the ammonia decomposition at these growth temperatures is insufficient. To stabilize InN at higher growth temperature, we explored the growth of InN by high-pressure chemical vapor deposition (HPCVD) at 10 bar and 15 bar reactor pressures. Under these growth conditions the growth temperature can be increased to around 800 °C, resulting in improved ammonia decomposition and smaller group III/N precursor ratio.

This contribution presents results on the effect of the layer thickness on the physical properties of epitaxial InN layers. All InN layers where grown on GaN/sapphire (0001) templates under identical growth conditions, only the growth time was varied. Fourier transform IR reflectance (FTIR) spectroscopy was used to analyze the film thickness and the optoelectronic layer properties. We will present results on the free carrier concentration and mobility as a function of layer thickness. The reflectance spectra were simulated using a Lorentz-Drude model and a multilayer stack model, which allows determining the phonon frequencies, dielectric function, plasma frequency, and damping parameters. From these, the free carrier concentration and mobility for each layer can be calculated. The crystalline quality of the epilayers has been characterized by XRD 2theta- omega scans and by Raman spectroscopy analysis.

The dependency of the optoelectronic and structural properties of InN epilayers on the reactor pressure is presented. The InN epilayers were grown by high-pressure chemical vapor deposition (HPCVD) varying the reactor pressure from atmospheric pressure to 18.5 bar. The optoelectronic properties such as free carrier concentration and mobility have been studied using Fourier transform IR reflection spectroscopy. The film thickness, growth rate, free carrier concentration and carrier mobility of the InN layer are obtained by simulating the IR reflectance spectra, using a multilayer stack layer model and a Lorentz-Drude model. XRD 2theta- omega scans and Raman spectroscopy were used to evaluate the structural properties of the epilayers.

Ternary In_xGa_1-xN alloys and embedded epilayers are of great interest due to their large band gap tenability, which enables new applications in the fields of advanced optoelectronic devices. Here, the growth of ternary In_xGa_1-xN epilayers is explored by high-pressure chemical vapor deposition (HPCVD) and pulsed precursor injection in order to reduce the temperature gap between the binary alloys GaN and InN and to improve the phase stability on the ternary alloys. In the pulsed precursor injection approach, the precursor separation times between the metal organic (MO) sources (TMI and TMG) and ammonia (S₁), and ammonia and MO (S₂) are two critical process parameters. Previous studies on InN growth showed that the precursors separation critically influences the surface chemistry and the resulting structural and physical layer properties.

In this contribution, we present results on indium-rich InGaN epilayers grown by simultaneous MO injection and with different S₂ timings, with the aim to find the optimum S₂ separation for high quality, single-phase InGaN epilayers. We will show that the S₂ separation is critical for the incorporation of gallium into the epilayers. In order to maintain single-phase epilayers, the S₂ separation has to be increased from S₂=400 ms for InN to over 1200 ms for In_xGa_1-xN with x=0.2. Raman spectroscopy and X-ray diffraction (XRD) are used to study the structural properties and the Fourier Transform Infra-red (FTIR) and transmission spectroscopy are used to study the electrical and optical properties of the epilayers.

Conventional silicon photovoltaics lack the ability to absorb the full electromagnetic spectrum arriving from the sun. Nickel silicides are small band-gap semiconductors that effectively engage the near-infrared region, whereas bare silicon does not. Ultra-thin (<100nm) silicon structures incorporated with nickel silicides have been synthesized and characterized and have shown enhanced absorption from 750-3000nm wavelengths. Four different structures were constructed via a combination of sputtering, co-sputtering and laser irradiation and their optical and electrical characteristics were compared. In one case, the nickel is deposited and reacted between the p and the n+ silicon regions; in another, nickel is co-sputtered along with p-Si and co-sputtered with n+ silicon; and finally nickel is co-sputtered with silicon followed by laser irradiation to form nickel silicide nanoparticles via pulsed laser induced dewetting. This last structure contains non-patterned nanoparticles (<50nm) in close proximity to a pn junction after capping the former with the p and n+ silicon. In this presentation we will correlate the material composition and micro and nanostructure by STEM and EELS to the observed optical and photovoltaic responses and demonstrate effective media approximations for the observed optical properties.

More cell phones are damaged by water than by any other means, and this damage often requires the devices to be discarded. The number of damaged phones is also increasing because these phones are now taken almost everywhere. Chemical vapor deposition may provide a solution to this problem, which is large (100.9 million Smartphones were shipped in Q4 2010). For example, the phones may be coated with a hydrophobic monolayer or multilayer of fluorosilanes. Bonding of the fluorosilane may be improved using of a primary adhesion layer, which may be a different silane monolayer, e.g., an isocyanatosilane, and/or by introduction of hydroxyl groups via plasma treatment. The latter process is typically rapid and economical and can take place both on oxide and polymeric materials. The presence of OH groups can be assayed by XPS, ToF-SIMS and ATR-FTIR. The density of surface hydroxyl groups can be varied by changing the proportions of etch gases, the time and intensity of the plasma treatment, and the system base pressure. The hydrophobicity of the surface can be characterized by contact angle goniometry and XPS and ToF-SIMS analysis of fluorine. Resistance to abrasion can be tested with a Martindale abrasion tester. This work can be further extended to touch screen panels in equipment used under water.