AVS2000 Session PS+MS-WeM: Plasma-Induced Damage

Wednesday, October 4, 2000 8:20 AM in Room 311

Wednesday Morning

Start	Invited?	Item
8:20 AM		PS+MS-WeM-1 Plasma-Induced Charging Gate Oxide Pinhole Formation T.C. Ang, S.Y. Loong, P.I. Ong, W.B. Loh (Chartered Semiconductor Manufacturing, Singapore); Y.W. Teh (Nanyang Technological University, Singapore) Plasma process induced charging damage to gate oxide is a growing concern in ULSI MOS device fabrication. This is due to gate oxide thinning resulting from continuous CMOS downsizing and increasing use of high density plasma (HDP) tools. In this paper, we study the extent of the plasma induced damage resulting from HDP inter-metal dielectric deposition process in 0.18um transistor technology. Gate oxide pinhole formation resulting from plasma induced charging damage was observed above a threshold ion density. Transistor test structures with different types of antennas and antenna ratios were used to monitor the plasma damage. The extent of the plasma charging damage was evaluated through shift in gate leakage, threshold voltage and transconductance from a reference transistor with no antenna attached. Each of these parameters were measured for a large number of transistors in order to statistically assess the level of plasma based gate oxide damage. Gate oxide pinhole formation was observed in transistors with antenna ratios above a certain value. The pinholes were caused by localized breakthrough of the gate oxide resulting from charge imbalance in the plasma and are only present when the charge imbalance exceeds a threshold value. Based on our results, we have determined the threshold value for charge imbalance and ion density to cause gate oxide pinhole formation. We have also developed a novel integration scheme which is effective in reducing the charging damage from the high density plasma process significantly and no gate oxide pinholes were observed with the implementation of this scheme.
8:40 AM		PS+MS-WeM-2 Effects of Plasma-induced Charging Damages on Thin Gate Oxide during Plasma Etching Processes Y.-K. Kim, K.-O. KIm, J.-Y. Kim, C.J. Choi, J.W. Kim (Hyundai Electronics Industries Co., Ltd., Korea) Using the plasma damage monitoring (PDM) system, we investigated the plasma-induced charging damage in the thermally-grown SiO₂ on p-type Si substrates after plasma etching of gate electrode. Recently, the technique has been frequently employed to monitor oxide damages induced by plasma processes. It determines the changes in oxide electrical properties such as flatband voltage (V_fb), oxide resistivity (ρ_ox), effective charges (Q_eff), interface trap density (D_it), etc. The measured Q_eff as well as D_it value indicates that the plasma has induced a large amount of positive charges trapped in the bulk oxide and the interfacial defects in the SiO₂-Si interfaces. The trapped oxide charges are also the origin of the large V_fb shifts as well as the reduced ρ_ox. The observed charging damages have been found to be dependent strongly on the etching gases as well as the plasma conditions. The site-dependent variations of the charging damages were attributed to the non-uniform radial distribution of the charges on the oxide surfaces during the etching processes. A MOS capacitor was fabricated over the thin thermal oxide by employing the above plasma exposures during the poly-Si electrode and the subsequent pad etching to measure the changes in the gate oxide integrity (GOI) characteristics. Finally, we will quantitatively show that the leakage current of the thin gate oxide after the plasma processing is strongly related with the measured PDM results.
9:00 AM	Invited	PS+MS-WeM-3 The Use of Simultaneous Modulation of Source and Wafer RF to Reduce Plasma Induced Damage N. Hershkowitz (University of Wisconsin, Madison) A variety of different types of plasma phenomena can lead to plasma induced damage in the fabrication of small geometry devices. Oxide charging (probably the most significant source of damage), macroscopic and microscopic differential charging, over energetic ion beams, UV induced carriers and plasma etch induced silicon substrate roughness are some examples. In this paper, it is argued that simultaneous modulation of source and wafer RF in HDP tools provides a "control knob" for eliminating and/or reducing many of the sources of damage. Data are presented showing improvements resulting from simultaneous source and wafer (on-off) modulation. RF frequency and modulation duty cycle effects are discussed together with damage reduction mechanisms.
9:40 AM		PS+MS-WeM-5 Effect of Oxide to Nitride Etch Selectivity on Plasma Induced Charging Damage S. Ma, C. Björkman, R. Wang, L. Zhang, H. Shan (Applied Materials Inc.); R. Ramanathan (Conexant Systems) Nitride layers are widely used for dual-damascene, self-aligned contact and border-less contact dielectric etch process as etch stop layers. It is also believed that such etch stop layer on top of metal electrode can also serve as plasma charging damage protection layer. This study shows no relationship between the dielectric to nitride etch selectivity and plasma induced charging damage. A Magnetically Enhanced Reactive Ion Etching (MERIE) chamber is used for this study with 0.25 um technology devices. In fluorine contained etching chemistry, strong recipe dependence on plasma charging damage is found regardless of the dielectric to nitride etch selectivity. A model of leaky nitride with charge built up on via hole bottom is proposed to explain the phenomena. In pure oxygen chemistry for in-situ polymer removal, plasma induced charging damage depends on the remaining nitride thickness. It is found that power is the most sensitive parameter than B-field, pressure, overetch and gas species to control damage. A mechanism is also proposed to explain the role of polymer formation and removal on top of nitride stop layer to plasma charging damage sensitivity
10:00 AM		PS+MS-WeM-6 Aspect Ratio Dependent Plasma-Induced Charging Damage in RF Pre-Cleaning of Metal Contact J. Kim, K.S. Shin, W.J. Park, C.J. Kang, T.-H. Ahn, J.-T. Moon (Samsung Electronics, Korea) As the packing density increases in the fabrication of semiconductor, the aspect ratio and the CD (Critical Dimension) of a metal contact are exponentially aggravated in the dry etch process. The aspect ratio dependency on a plasma-induced charging damage during the RF pre-cleaning of a metal contact has been evaluated with the two dimensional Monte-Carlo simulation and the related experiments. From the simulation of a metal contact opened on a gate metal, it is found that the potential on a metal contact bottom, which is directly related to plasma-induced charging damage, is saturated near 4 of aspect ratio after linearly increasing with the aspect ratio. However, the linear decrease of CD of a metal contact exponentially increases the potential stress on gate oxide. These simulation results are confirmed with the two different experiments, an in-situ charge-up monitoring and the electric test of a fully fabricated CMOS wafers. A phase-controlled inductively coupled plasma is proposed to suppress the plasma-induced charging damage. With the phase-controlled inductively coupled plasma, the plasma-induced damage is strongly suppressed when the phase delay of the bias power to the source power is near 180 degree.
10:20 AM		PS+MS-WeM-7 Real-time Observation of Relaxation of Disorder-induced Surface Stress T. Narushima, N. Ueda (University of Tsukuba, Japan); A.N. Itakura (National Research Institute for Metals, Japan); T. Kawabe (University of Tsukuba, Japan); M. Kitajima (National Research Institute for Metals, Japan) We present relaxation of disorder-induced surface stress. The surface stress changes on Si(100) were measured by means of an optical micro-mechanical cantilever technique. The samples were Si(100) cantilevers (450µm x 50µm x 2µm). They were treated by being dipped in 10% HF acid solution for 5 minutes, rinsed with deionized water for 5 minutes, and annealed at 1000K for 30 minutes in a UHV. To introduce disorder to surface, the surfaces were bombarded using an argon plasma with applying negative biases (-30V to -100V) at room temperature. Then, the disordered surfaces were oxidized using an oxygen plasma with applying positive bias (+45V), where the surfaces were subject to electron irradiation. We found a development of compressive stress on the Si surface due to defects produced by ion bombardment. This disorder-induced compressive stress was completely relaxed by the following plasma oxidation. The initial evolution of the surface stress during oxidation on the bombarded surfaces is quite different from that on unbombarded Si(100) surfaces. The disorder-induced stress was also relaxed completely by an exposure to argon plasmas under anodic conditions. The stress relaxation should be promoted not only by oxidation but also by electron irradiation. A possible mechanism of the stress relaxation is surface diffusion of Si adatoms via electron irradiation.
10:40 AM		PS+MS-WeM-8 Transient Charging Effects of Insulating Surfaces Exposed to a Plasma During Pulse Biased DC Magnetron Sputtering. E.V. Barnat, T.-M. Lu (Rensselaer Polytechnic Institute) The ability to control the charging of thin dielectric films exposed to ionized discharges, using a pulsed bias, is studied experimentally and theoretically. A dielectric film is exposed to the discharge and the transient currents associated with the dielectric's charging are measured after each pulse. Factors effecting the time scale the film undergoes charging, including the dielectric constant, the dielectric's thickness, the plasma density, and the amount of potential applied during each pulse are explored. By constructing a simple model based on the plasma's impedance to the pulsed bias and the capacitive coupling between the electrode and the surface of the dielectric where the charge accumulates, the observed transient currents are explained. Calculations are then made to determine the energy distribution of the ions extracted from the plasma and how both the pulse of the electrode and the charging of the dielectric influence the ion energy distributions. To demonstrate an application of the pulse bias technique, it is shown that we can dramatically control the film morphology and microstructure by pulse biasing the electrode. Also, by properly setting the pulse bias, the pulse frequency or the pulse duty, damage to thin dielectric films, such as electrical breakdown, is prevented during metallization.