AVS1996 Session PS+FP-WeM: Plasma Processing Issues of Flat Panel Displays

Wednesday, October 16, 1996 8:20 AM in Room 201C

Wednesday Morning

Start	Invited?	Item
8:20 AM	Invited	PS+FP-WeM-1 Use of Plasma Processing in Making Flat Panel Displays R. Gottscho, A. Shih (Lam Research Corporation) Flat panel displays, in particular, active matrix liquid crystal displays (AMLCDs), are now widely used in applications ranging from laptop computers to portable televisions. Plasma processing is used throughout AMLCD fabrication for thin film deposition, etching, resist descumming, resist ashing, and surface cleaning. Initially, plasmas were used primarily for deposition of the amorphous Si and silicon nitride that constitute the semiconducting channel and gate insulator, respectively, of the thin film transistor (TFT) used to switch picture elements or pixels on and off. While processes have been developed that yield adequate electrical performance, challenges remain in reducing particulate contamination as substrate sizes continue to increase toward 800x1000mm. Because it enables the tapering of sidewalls and reduces the usage of hazardous solvents, plasma is also being used more and more in FPD etching, despite the relatively large dimensions of TFTs and pixels. Tapering sidewalls is essential for reducing the number of capacitor and cross-over shorts that otherwise produce killer line defects. We review the usage of plasma processing in making AMLCDs and highlight the challenges and opportunities that lie ahead.
9:00 AM		PS+FP-WeM-3 Dry Etching of Indium Tin Oxide (ITO) A. Demos, J. Holland, T. Ni, P. Shufflebotham, M. Barnes (Lam Research Corporation) A process for the plasma etching of ITO using a planar, inductively coupled plasma source has been developed using HBr and HBr and Cl\sub 2\ chemistry. The planar source is based on transformer coupled plasma (TCP) technology, which is capable of generating uniform high density plasmas by inductively coupling RF power from a planar coil to the plasma. Indium tin oxide is a transparent electrode material used in flat panel displays and is predominately wet etched. Etching of ITO in traditional plasma reactors provides marginal etch rates at best with poor selectivity to photoresist. The high density TCP source on the other hand can achieve high etch rates while maintaining acceptable selectivity to photoresist. To maintain adequate substrate temperatures a large area electrostatic chuck was developed to allow substrate cooling. Tests of this ESC have shown that under normal processing conditions it can maintain temperature uniformity at multiple points on the substrate to better than \+-\ 5 C across a 360 x 465 mm glass substrate. ITO etch results for 360 x 465 mm substrates have been obtained as a function of different plasma conditions. A typical etch process for ITO using HBr and Cl\sub 2\ chemistry, yielded an etch rate of 2500 \Ao\ /min using high inductive power and moderate RF bias power. Other conditions produced etch rates well over 3000 A/min. Etch uniformities of less than 5% for 360 x 465 mm substrates were also obtained with this large area etch tool. Selectivities of ITO to silicon nitride were also studied with values of 10:1 easily obtained. Finally, the ITO etch mechanisms and resulting etch products will be discussed as a function of the process conditions.
9:20 AM		PS+FP-WeM-4 Very Low Temperature (less than 70C) Selective-area Silicon Deposition using Pulsed-gas PECVD for Thin Film Transistor Applications W. Read, G. Parsons (North Carolina State University) Substrate selective microcrystalline silicon deposition can be achieved at temperatures as low as 50C by plasma enhanced chemical vapor deposition using pulsed silane flow into a hydrogen plasma. Selective area deposition of doped or undoped silicon is obtained by repeated cycles of thin layer deposition, followed by a selective etching step. Low temperature selective deposition can be used in thin film transistor (TFT) devices to simplify processing, reduce device dimensions, and produce new device structures. Problems with selective deposition include low deposition rates, stray nucleation, and feature-scale loading effects. We have achieved selective deposition of silicon in a large area (30 x 33 cm2) PECVD reactor, and found that the deposition rate can be increased by decreasing the substrate temperature. At 250C under typical gas-pulsing times (silane to reactor/silane to pumps = 22s/50s), the selective deposition rate is low (10A/min). By reducing the substrate temperature to 75C, the H2 plasma exposure time can be reduced to 19 s/cycle, resulting in an increase in the selective deposition rate to 23A/min. Using real-time mass spectroscopic process sensing, we observe a silicon related signal during the hydrogen exposure cycle, indicating silicon etching. The silane signal increases as temperature is decreased, demonstrating an increase in silicon etching rate during hydrogen exposure, which leads to a higher net deposition rate. We will also discuss the observed pattern dependence in selective deposition, where reduced deposition rates are observed on features less than 10 microns.
9:40 AM		PS+FP-WeM-5 Pulsed-Gas Plasma Deposition of Micro- and Poly-crystalline Silicon for Thin Film Transistors E. Srinivasan, G. Parsons (North Carolina State University) Low temperature (<400 C) silicon deposition is critical for thin film transistors (TFT's) used in active matrix displays and image sensors. A low temperature "direct" deposition process for polysilicon on glass would lead to large area displays with improved performance and resolution. We have studied silicon crystal formation in low temperature PECVD using pulsed-gas deposition, where films are formed using a repeated sequence of thin silicon layer deposition using silane (or silane and hydrogen) followed by atomic hydrogen exposure. We find using Raman spectroscopy that the crystal fraction increases with hydrogen exposure time. However, the crystal fraction is larger when only silane is used during the deposition cycle, as compared to when silane and hydrogen are used. Hydrogen elimination has been investigated by varying the gas-pulsing duty cycle, temperature, and by using deuterium exposure in place of hydrogen. By increasing the duration of H exposure at a constant deposition time, the monohydride content is reduced significantly, whereas the dihydride fraction is almost constant at all temperatures. Our results using deuterium indicate that while etching occurs, the predominant pathway for hydrogen elimination is hydrogen abstraction. We find using ab initio configuration interaction theory that the barrier for abstraction from a SiH2 unit is 7.3 kcal/mol as compared to 5.5 kcal/mol for SiH, which is consistent with the observed preferential abstraction from Si-H units. These results suggest that the SiH2 concentration may limit the growth of large crystals in this process. Results of these materials in device structures will be discussed.
10:00 AM		PS+FP-WeM-6 Reactive Ion Etching of Sulfides and Oxides for Flat Panel EL Display Devices B. Pathangey, J. Lee, P. Holloway, S. Pearton, M. Davidson (University of Florida, Gainesville) Reactive Ion plasma etch processes have been investigated with SF\sub 6\/Ar, CH\sub 4\/H\sub 2\/Ar, and Cl\sub 2\/Ar gas chemistries in an ECR/RIE reactor on EL device materials consisting of sulfides (SrS and ZnS) and oxides (Al\sub 2\O\sub 3\ and AlTiO\sub 2\). Etch rate, surface composition, and morphology have been examined as a function of ECR microwave power (0-1000W) and RF Power (150-450W) at 1.5 mTorr. In relation to the gas chemistries, under moderate ECR powers, etch rates on all four materials seems to follow the trend SF\sub 6\ > CH\sub 4\ > Cl\sub 2\, depending on the material reactivity and the etched product volatility and its removal from the surface. The etch rates of SrS in all three gas chemistries are significantly lower at low RF powers. Typical enhancement in the etch rates of greater than an order of magnitude have been found for both oxides and sulfides under ECR conditions. The etched surface tends to be rougher for processes with ECR powers > 600W and accumulation of reactive gas species have been detected.
10:20 AM		PS+FP-WeM-7 Negative Sulfur-Ion Resputtering during RF Magnetron Sputter Deposition of SrS:Ce and Sr\sub x\Ca\sub 1-x\Ga\sub 2\S\sub 4\:Ce Thin Film EL Phosphors M. Davidson, B. Pathangey, P. Holloway (University of Florida, Gainesville); S. Sun (Planar Systems, Inc.) Negative sulfur-ion resputtering effects have been found to dominate the quality and morphology of thin film electroluminescent (TFEL) SrS:Ce and Sr\sub x\Ca\sub 1-x\Ga\sub 2\S\sub 4\:Ce. The effect is indicated by the unexpected inverse relationship between RF power (sputter rate) and deposition rate. In the worst cases, there was no film deposited and the substrates were etched as much as 4um. Developed DC biases on the target have been measured under a variety of conditions and were found to be large enough to accelerate negative sulfur ions generated during the sputter process to energies greater than 200 eV. The composition, morphology, and performance of the TFEL phosphors is found to be strongly affected by the energy and flux of the sulfur ions and the electric fields present in the depostion zone. Depositions of the same materials using ion-beam depostion, where there is little or no DC bias between the target and the substrate, show little or no effect from sulfur ion bombardment.